38 static void __iomem *timer_base;  variable
45 	val = readl(timer_base + TPM_C0SC);  in tpm_timer_disable()
47 	writel(val, timer_base + TPM_C0SC);  in tpm_timer_disable()
55 	val = readl(timer_base + TPM_C0SC);  in tpm_timer_enable()
58 	writel(val, timer_base + TPM_C0SC);  in tpm_timer_enable()
63 	writel(TPM_STATUS_CH0F, timer_base + TPM_STATUS);  in tpm_irq_acknowledge()
70 	return readl(timer_base + TPM_CNT);  in tpm_read_counter()
90 	writel(next, timer_base + TPM_C0V);  in tpm_set_next_event()
156 	return clocksource_mmio_init(timer_base + TPM_CNT,  in tpm_clocksource_init()
195 	timer_base = timer_of_base(&to_tpm);  in tpm_timer_init()
197 	counter_width = (readl(timer_base + TPM_PARAM)  in tpm_timer_init()
211 	writel(0, timer_base + TPM_SC);  in tpm_timer_init()
213 	writel(TPM_SC_TOF_MASK, timer_base + TPM_SC);  in tpm_timer_init()
214 	writel(0, timer_base + TPM_CNT);  in tpm_timer_init()
216 	writel(TPM_C0SC_CHF_MASK, timer_base + TPM_C0SC);  in tpm_timer_init()
225 		timer_base + TPM_SC);  in tpm_timer_init()
228 	writel(GENMASK(counter_width - 1, 0), timer_base + TPM_MOD);  in tpm_timer_init()