140 	u32 cr;  in fttmr010_timer_set_next_event()  local
143 	cr = readl(fttmr010->base + TIMER_CR);  in fttmr010_timer_set_next_event()
144 	cr &= ~fttmr010->t1_enable_val;  in fttmr010_timer_set_next_event()
145 	writel(cr, fttmr010->base + TIMER_CR);  in fttmr010_timer_set_next_event()
155 		cr = readl(fttmr010->base + TIMER1_COUNT);  in fttmr010_timer_set_next_event()
156 		writel(cr + cycles, fttmr010->base + TIMER1_MATCH1);  in fttmr010_timer_set_next_event()
160 	cr = readl(fttmr010->base + TIMER_CR);  in fttmr010_timer_set_next_event()
161 	cr |= fttmr010->t1_enable_val;  in fttmr010_timer_set_next_event()
162 	writel(cr, fttmr010->base + TIMER_CR);  in fttmr010_timer_set_next_event()
170 	u32 cr;  in fttmr010_timer_shutdown()  local
173 	cr = readl(fttmr010->base + TIMER_CR);  in fttmr010_timer_shutdown()
174 	cr &= ~fttmr010->t1_enable_val;  in fttmr010_timer_shutdown()
175 	writel(cr, fttmr010->base + TIMER_CR);  in fttmr010_timer_shutdown()
183 	u32 cr;  in fttmr010_timer_set_oneshot()  local
186 	cr = readl(fttmr010->base + TIMER_CR);  in fttmr010_timer_set_oneshot()
187 	cr &= ~fttmr010->t1_enable_val;  in fttmr010_timer_set_oneshot()
188 	writel(cr, fttmr010->base + TIMER_CR);  in fttmr010_timer_set_oneshot()
198 		cr = readl(fttmr010->base + TIMER_INTR_MASK);  in fttmr010_timer_set_oneshot()
199 		cr &= ~(TIMER_1_INT_OVERFLOW | TIMER_1_INT_MATCH2);  in fttmr010_timer_set_oneshot()
200 		cr |= TIMER_1_INT_MATCH1;  in fttmr010_timer_set_oneshot()
201 		writel(cr, fttmr010->base + TIMER_INTR_MASK);  in fttmr010_timer_set_oneshot()
211 	u32 cr;  in fttmr010_timer_set_periodic()  local
214 	cr = readl(fttmr010->base + TIMER_CR);  in fttmr010_timer_set_periodic()
215 	cr &= ~fttmr010->t1_enable_val;  in fttmr010_timer_set_periodic()
216 	writel(cr, fttmr010->base + TIMER_CR);  in fttmr010_timer_set_periodic()
222 		cr = 0xffffffff - (period - 1);  in fttmr010_timer_set_periodic()
223 		writel(cr, fttmr010->base + TIMER1_COUNT);  in fttmr010_timer_set_periodic()
224 		writel(cr, fttmr010->base + TIMER1_LOAD);  in fttmr010_timer_set_periodic()
227 		cr = readl(fttmr010->base + TIMER_INTR_MASK);  in fttmr010_timer_set_periodic()
228 		cr &= ~(TIMER_1_INT_MATCH1 | TIMER_1_INT_MATCH2);  in fttmr010_timer_set_periodic()
229 		cr |= TIMER_1_INT_OVERFLOW;  in fttmr010_timer_set_periodic()
230 		writel(cr, fttmr010->base + TIMER_INTR_MASK);  in fttmr010_timer_set_periodic()
234 	cr = readl(fttmr010->base + TIMER_CR);  in fttmr010_timer_set_periodic()
235 	cr |= fttmr010->t1_enable_val;  in fttmr010_timer_set_periodic()
236 	writel(cr, fttmr010->base + TIMER_CR);  in fttmr010_timer_set_periodic()