234 static inline u32 sh_cmt_read_cmstr(struct sh_cmt_channel *ch)  in sh_cmt_read_cmstr()  argument
236 	if (ch->iostart)  in sh_cmt_read_cmstr()
237 		return ch->cmt->info->read_control(ch->iostart, 0);  in sh_cmt_read_cmstr()
239 		return ch->cmt->info->read_control(ch->cmt->mapbase, 0);  in sh_cmt_read_cmstr()
242 static inline void sh_cmt_write_cmstr(struct sh_cmt_channel *ch, u32 value)  in sh_cmt_write_cmstr()  argument
244 	if (ch->iostart)  in sh_cmt_write_cmstr()
245 		ch->cmt->info->write_control(ch->iostart, 0, value);  in sh_cmt_write_cmstr()
247 		ch->cmt->info->write_control(ch->cmt->mapbase, 0, value);  in sh_cmt_write_cmstr()
250 static inline u32 sh_cmt_read_cmcsr(struct sh_cmt_channel *ch)  in sh_cmt_read_cmcsr()  argument
252 	return ch->cmt->info->read_control(ch->ioctrl, CMCSR);  in sh_cmt_read_cmcsr()
255 static inline void sh_cmt_write_cmcsr(struct sh_cmt_channel *ch, u32 value)  in sh_cmt_write_cmcsr()  argument
257 	ch->cmt->info->write_control(ch->ioctrl, CMCSR, value);  in sh_cmt_write_cmcsr()
260 static inline u32 sh_cmt_read_cmcnt(struct sh_cmt_channel *ch)  in sh_cmt_read_cmcnt()  argument
262 	return ch->cmt->info->read_count(ch->ioctrl, CMCNT);  in sh_cmt_read_cmcnt()
265 static inline void sh_cmt_write_cmcnt(struct sh_cmt_channel *ch, u32 value)  in sh_cmt_write_cmcnt()  argument
267 	ch->cmt->info->write_count(ch->ioctrl, CMCNT, value);  in sh_cmt_write_cmcnt()
270 static inline void sh_cmt_write_cmcor(struct sh_cmt_channel *ch, u32 value)  in sh_cmt_write_cmcor()  argument
272 	ch->cmt->info->write_count(ch->ioctrl, CMCOR, value);  in sh_cmt_write_cmcor()
275 static u32 sh_cmt_get_counter(struct sh_cmt_channel *ch, u32 *has_wrapped)  in sh_cmt_get_counter()  argument
280 	o1 = sh_cmt_read_cmcsr(ch) & ch->cmt->info->overflow_bit;  in sh_cmt_get_counter()
285 		v1 = sh_cmt_read_cmcnt(ch);  in sh_cmt_get_counter()
286 		v2 = sh_cmt_read_cmcnt(ch);  in sh_cmt_get_counter()
287 		v3 = sh_cmt_read_cmcnt(ch);  in sh_cmt_get_counter()
288 		o1 = sh_cmt_read_cmcsr(ch) & ch->cmt->info->overflow_bit;  in sh_cmt_get_counter()
296 static void sh_cmt_start_stop_ch(struct sh_cmt_channel *ch, int start)  in sh_cmt_start_stop_ch()  argument
302 	raw_spin_lock_irqsave(&ch->cmt->lock, flags);  in sh_cmt_start_stop_ch()
303 	value = sh_cmt_read_cmstr(ch);  in sh_cmt_start_stop_ch()
306 		value |= 1 << ch->timer_bit;  in sh_cmt_start_stop_ch()
308 		value &= ~(1 << ch->timer_bit);  in sh_cmt_start_stop_ch()
310 	sh_cmt_write_cmstr(ch, value);  in sh_cmt_start_stop_ch()
311 	raw_spin_unlock_irqrestore(&ch->cmt->lock, flags);  in sh_cmt_start_stop_ch()
314 static int sh_cmt_enable(struct sh_cmt_channel *ch)  in sh_cmt_enable()  argument
318 	pm_runtime_get_sync(&ch->cmt->pdev->dev);  in sh_cmt_enable()
319 	dev_pm_syscore_device(&ch->cmt->pdev->dev, true);  in sh_cmt_enable()
322 	ret = clk_enable(ch->cmt->clk);  in sh_cmt_enable()
324 		dev_err(&ch->cmt->pdev->dev, "ch%u: cannot enable clock\n",  in sh_cmt_enable()
325 			ch->index);  in sh_cmt_enable()
330 	sh_cmt_start_stop_ch(ch, 0);  in sh_cmt_enable()
333 	if (ch->cmt->info->width == 16) {  in sh_cmt_enable()
334 		sh_cmt_write_cmcsr(ch, SH_CMT16_CMCSR_CMIE |  in sh_cmt_enable()
337 		sh_cmt_write_cmcsr(ch, SH_CMT32_CMCSR_CMM |  in sh_cmt_enable()
343 	sh_cmt_write_cmcor(ch, 0xffffffff);  in sh_cmt_enable()
344 	sh_cmt_write_cmcnt(ch, 0);  in sh_cmt_enable()
358 		if (!sh_cmt_read_cmcnt(ch))  in sh_cmt_enable()
363 	if (sh_cmt_read_cmcnt(ch)) {  in sh_cmt_enable()
364 		dev_err(&ch->cmt->pdev->dev, "ch%u: cannot clear CMCNT\n",  in sh_cmt_enable()
365 			ch->index);  in sh_cmt_enable()
371 	sh_cmt_start_stop_ch(ch, 1);  in sh_cmt_enable()
375 	clk_disable(ch->cmt->clk);  in sh_cmt_enable()
381 static void sh_cmt_disable(struct sh_cmt_channel *ch)  in sh_cmt_disable()  argument
384 	sh_cmt_start_stop_ch(ch, 0);  in sh_cmt_disable()
387 	sh_cmt_write_cmcsr(ch, 0);  in sh_cmt_disable()
390 	clk_disable(ch->cmt->clk);  in sh_cmt_disable()
392 	dev_pm_syscore_device(&ch->cmt->pdev->dev, false);  in sh_cmt_disable()
393 	pm_runtime_put(&ch->cmt->pdev->dev);  in sh_cmt_disable()
403 static void sh_cmt_clock_event_program_verify(struct sh_cmt_channel *ch,  in sh_cmt_clock_event_program_verify()  argument
406 	u32 value = ch->next_match_value;  in sh_cmt_clock_event_program_verify()
412 	now = sh_cmt_get_counter(ch, &has_wrapped);  in sh_cmt_clock_event_program_verify()
413 	ch->flags |= FLAG_REPROGRAM; /* force reprogram */  in sh_cmt_clock_event_program_verify()
420 		ch->flags |= FLAG_SKIPEVENT;  in sh_cmt_clock_event_program_verify()
432 		if (new_match > ch->max_match_value)  in sh_cmt_clock_event_program_verify()
433 			new_match = ch->max_match_value;  in sh_cmt_clock_event_program_verify()
435 		sh_cmt_write_cmcor(ch, new_match);  in sh_cmt_clock_event_program_verify()
437 		now = sh_cmt_get_counter(ch, &has_wrapped);  in sh_cmt_clock_event_program_verify()
438 		if (has_wrapped && (new_match > ch->match_value)) {  in sh_cmt_clock_event_program_verify()
445 			ch->flags |= FLAG_SKIPEVENT;  in sh_cmt_clock_event_program_verify()
456 			ch->match_value = new_match;  in sh_cmt_clock_event_program_verify()
467 			ch->match_value = new_match;  in sh_cmt_clock_event_program_verify()
483 			dev_warn(&ch->cmt->pdev->dev, "ch%u: too long delay\n",  in sh_cmt_clock_event_program_verify()
484 				 ch->index);  in sh_cmt_clock_event_program_verify()
489 static void __sh_cmt_set_next(struct sh_cmt_channel *ch, unsigned long delta)  in __sh_cmt_set_next()  argument
491 	if (delta > ch->max_match_value)  in __sh_cmt_set_next()
492 		dev_warn(&ch->cmt->pdev->dev, "ch%u: delta out of range\n",  in __sh_cmt_set_next()
493 			 ch->index);  in __sh_cmt_set_next()
495 	ch->next_match_value = delta;  in __sh_cmt_set_next()
496 	sh_cmt_clock_event_program_verify(ch, 0);  in __sh_cmt_set_next()
499 static void sh_cmt_set_next(struct sh_cmt_channel *ch, unsigned long delta)  in sh_cmt_set_next()  argument
503 	raw_spin_lock_irqsave(&ch->lock, flags);  in sh_cmt_set_next()
504 	__sh_cmt_set_next(ch, delta);  in sh_cmt_set_next()
505 	raw_spin_unlock_irqrestore(&ch->lock, flags);  in sh_cmt_set_next()
510 	struct sh_cmt_channel *ch = dev_id;  in sh_cmt_interrupt()  local
513 	sh_cmt_write_cmcsr(ch, sh_cmt_read_cmcsr(ch) &  in sh_cmt_interrupt()
514 			   ch->cmt->info->clear_bits);  in sh_cmt_interrupt()
520 	if (ch->flags & FLAG_CLOCKSOURCE)  in sh_cmt_interrupt()
521 		ch->total_cycles += ch->match_value + 1;  in sh_cmt_interrupt()
523 	if (!(ch->flags & FLAG_REPROGRAM))  in sh_cmt_interrupt()
524 		ch->next_match_value = ch->max_match_value;  in sh_cmt_interrupt()
526 	ch->flags |= FLAG_IRQCONTEXT;  in sh_cmt_interrupt()
528 	if (ch->flags & FLAG_CLOCKEVENT) {  in sh_cmt_interrupt()
529 		if (!(ch->flags & FLAG_SKIPEVENT)) {  in sh_cmt_interrupt()
530 			if (clockevent_state_oneshot(&ch->ced)) {  in sh_cmt_interrupt()
531 				ch->next_match_value = ch->max_match_value;  in sh_cmt_interrupt()
532 				ch->flags |= FLAG_REPROGRAM;  in sh_cmt_interrupt()
535 			ch->ced.event_handler(&ch->ced);  in sh_cmt_interrupt()
539 	ch->flags &= ~FLAG_SKIPEVENT;  in sh_cmt_interrupt()
541 	if (ch->flags & FLAG_REPROGRAM) {  in sh_cmt_interrupt()
542 		ch->flags &= ~FLAG_REPROGRAM;  in sh_cmt_interrupt()
543 		sh_cmt_clock_event_program_verify(ch, 1);  in sh_cmt_interrupt()
545 		if (ch->flags & FLAG_CLOCKEVENT)  in sh_cmt_interrupt()
546 			if ((clockevent_state_shutdown(&ch->ced))  in sh_cmt_interrupt()
547 			    || (ch->match_value == ch->next_match_value))  in sh_cmt_interrupt()
548 				ch->flags &= ~FLAG_REPROGRAM;  in sh_cmt_interrupt()
551 	ch->flags &= ~FLAG_IRQCONTEXT;  in sh_cmt_interrupt()
556 static int sh_cmt_start(struct sh_cmt_channel *ch, unsigned long flag)  in sh_cmt_start()  argument
561 	raw_spin_lock_irqsave(&ch->lock, flags);  in sh_cmt_start()
563 	if (!(ch->flags & (FLAG_CLOCKEVENT | FLAG_CLOCKSOURCE)))  in sh_cmt_start()
564 		ret = sh_cmt_enable(ch);  in sh_cmt_start()
568 	ch->flags |= flag;  in sh_cmt_start()
571 	if ((flag == FLAG_CLOCKSOURCE) && (!(ch->flags & FLAG_CLOCKEVENT)))  in sh_cmt_start()
572 		__sh_cmt_set_next(ch, ch->max_match_value);  in sh_cmt_start()
574 	raw_spin_unlock_irqrestore(&ch->lock, flags);  in sh_cmt_start()
579 static void sh_cmt_stop(struct sh_cmt_channel *ch, unsigned long flag)  in sh_cmt_stop()  argument
584 	raw_spin_lock_irqsave(&ch->lock, flags);  in sh_cmt_stop()
586 	f = ch->flags & (FLAG_CLOCKEVENT | FLAG_CLOCKSOURCE);  in sh_cmt_stop()
587 	ch->flags &= ~flag;  in sh_cmt_stop()
589 	if (f && !(ch->flags & (FLAG_CLOCKEVENT | FLAG_CLOCKSOURCE)))  in sh_cmt_stop()
590 		sh_cmt_disable(ch);  in sh_cmt_stop()
593 	if ((flag == FLAG_CLOCKEVENT) && (ch->flags & FLAG_CLOCKSOURCE))  in sh_cmt_stop()
594 		__sh_cmt_set_next(ch, ch->max_match_value);  in sh_cmt_stop()
596 	raw_spin_unlock_irqrestore(&ch->lock, flags);  in sh_cmt_stop()
606 	struct sh_cmt_channel *ch = cs_to_sh_cmt(cs);  in sh_cmt_clocksource_read()  local
612 	raw_spin_lock_irqsave(&ch->lock, flags);  in sh_cmt_clocksource_read()
613 	value = ch->total_cycles;  in sh_cmt_clocksource_read()
614 	raw = sh_cmt_get_counter(ch, &has_wrapped);  in sh_cmt_clocksource_read()
617 		raw += ch->match_value + 1;  in sh_cmt_clocksource_read()
618 	raw_spin_unlock_irqrestore(&ch->lock, flags);  in sh_cmt_clocksource_read()
626 	struct sh_cmt_channel *ch = cs_to_sh_cmt(cs);  in sh_cmt_clocksource_enable()  local
628 	WARN_ON(ch->cs_enabled);  in sh_cmt_clocksource_enable()
630 	ch->total_cycles = 0;  in sh_cmt_clocksource_enable()
632 	ret = sh_cmt_start(ch, FLAG_CLOCKSOURCE);  in sh_cmt_clocksource_enable()
634 		ch->cs_enabled = true;  in sh_cmt_clocksource_enable()
641 	struct sh_cmt_channel *ch = cs_to_sh_cmt(cs);  in sh_cmt_clocksource_disable()  local
643 	WARN_ON(!ch->cs_enabled);  in sh_cmt_clocksource_disable()
645 	sh_cmt_stop(ch, FLAG_CLOCKSOURCE);  in sh_cmt_clocksource_disable()
646 	ch->cs_enabled = false;  in sh_cmt_clocksource_disable()
651 	struct sh_cmt_channel *ch = cs_to_sh_cmt(cs);  in sh_cmt_clocksource_suspend()  local
653 	if (!ch->cs_enabled)  in sh_cmt_clocksource_suspend()
656 	sh_cmt_stop(ch, FLAG_CLOCKSOURCE);  in sh_cmt_clocksource_suspend()
657 	pm_genpd_syscore_poweroff(&ch->cmt->pdev->dev);  in sh_cmt_clocksource_suspend()
662 	struct sh_cmt_channel *ch = cs_to_sh_cmt(cs);  in sh_cmt_clocksource_resume()  local
664 	if (!ch->cs_enabled)  in sh_cmt_clocksource_resume()
667 	pm_genpd_syscore_poweron(&ch->cmt->pdev->dev);  in sh_cmt_clocksource_resume()
668 	sh_cmt_start(ch, FLAG_CLOCKSOURCE);  in sh_cmt_clocksource_resume()
671 static int sh_cmt_register_clocksource(struct sh_cmt_channel *ch,  in sh_cmt_register_clocksource()  argument
674 	struct clocksource *cs = &ch->cs;  in sh_cmt_register_clocksource()
686 	dev_info(&ch->cmt->pdev->dev, "ch%u: used as clock source\n",  in sh_cmt_register_clocksource()
687 		 ch->index);  in sh_cmt_register_clocksource()
689 	clocksource_register_hz(cs, ch->cmt->rate);  in sh_cmt_register_clocksource()
698 static void sh_cmt_clock_event_start(struct sh_cmt_channel *ch, int periodic)  in sh_cmt_clock_event_start()  argument
700 	sh_cmt_start(ch, FLAG_CLOCKEVENT);  in sh_cmt_clock_event_start()
703 		sh_cmt_set_next(ch, ((ch->cmt->rate + HZ/2) / HZ) - 1);  in sh_cmt_clock_event_start()
705 		sh_cmt_set_next(ch, ch->max_match_value);  in sh_cmt_clock_event_start()
710 	struct sh_cmt_channel *ch = ced_to_sh_cmt(ced);  in sh_cmt_clock_event_shutdown()  local
712 	sh_cmt_stop(ch, FLAG_CLOCKEVENT);  in sh_cmt_clock_event_shutdown()
719 	struct sh_cmt_channel *ch = ced_to_sh_cmt(ced);  in sh_cmt_clock_event_set_state()  local
723 		sh_cmt_stop(ch, FLAG_CLOCKEVENT);  in sh_cmt_clock_event_set_state()
725 	dev_info(&ch->cmt->pdev->dev, "ch%u: used for %s clock events\n",  in sh_cmt_clock_event_set_state()
726 		 ch->index, periodic ? "periodic" : "oneshot");  in sh_cmt_clock_event_set_state()
727 	sh_cmt_clock_event_start(ch, periodic);  in sh_cmt_clock_event_set_state()
744 	struct sh_cmt_channel *ch = ced_to_sh_cmt(ced);  in sh_cmt_clock_event_next()  local
747 	if (likely(ch->flags & FLAG_IRQCONTEXT))  in sh_cmt_clock_event_next()
748 		ch->next_match_value = delta - 1;  in sh_cmt_clock_event_next()
750 		sh_cmt_set_next(ch, delta - 1);  in sh_cmt_clock_event_next()
757 	struct sh_cmt_channel *ch = ced_to_sh_cmt(ced);  in sh_cmt_clock_event_suspend()  local
759 	pm_genpd_syscore_poweroff(&ch->cmt->pdev->dev);  in sh_cmt_clock_event_suspend()
760 	clk_unprepare(ch->cmt->clk);  in sh_cmt_clock_event_suspend()
765 	struct sh_cmt_channel *ch = ced_to_sh_cmt(ced);  in sh_cmt_clock_event_resume()  local
767 	clk_prepare(ch->cmt->clk);  in sh_cmt_clock_event_resume()
768 	pm_genpd_syscore_poweron(&ch->cmt->pdev->dev);  in sh_cmt_clock_event_resume()
771 static int sh_cmt_register_clockevent(struct sh_cmt_channel *ch,  in sh_cmt_register_clockevent()  argument
774 	struct clock_event_device *ced = &ch->ced;  in sh_cmt_register_clockevent()
778 	irq = platform_get_irq(ch->cmt->pdev, ch->index);  in sh_cmt_register_clockevent()
784 			  dev_name(&ch->cmt->pdev->dev), ch);  in sh_cmt_register_clockevent()
786 		dev_err(&ch->cmt->pdev->dev, "ch%u: failed to request irq %d\n",  in sh_cmt_register_clockevent()
787 			ch->index, irq);  in sh_cmt_register_clockevent()
805 	ced->mult = div_sc(ch->cmt->rate, NSEC_PER_SEC, ced->shift);  in sh_cmt_register_clockevent()
806 	ced->max_delta_ns = clockevent_delta2ns(ch->max_match_value, ced);  in sh_cmt_register_clockevent()
807 	ced->max_delta_ticks = ch->max_match_value;  in sh_cmt_register_clockevent()
811 	dev_info(&ch->cmt->pdev->dev, "ch%u: used for clock events\n",  in sh_cmt_register_clockevent()
812 		 ch->index);  in sh_cmt_register_clockevent()
818 static int sh_cmt_register(struct sh_cmt_channel *ch, const char *name,  in sh_cmt_register()  argument
824 		ch->cmt->has_clockevent = true;  in sh_cmt_register()
825 		ret = sh_cmt_register_clockevent(ch, name);  in sh_cmt_register()
831 		ch->cmt->has_clocksource = true;  in sh_cmt_register()
832 		sh_cmt_register_clocksource(ch, name);  in sh_cmt_register()
838 static int sh_cmt_setup_channel(struct sh_cmt_channel *ch, unsigned int index,  in sh_cmt_setup_channel()  argument
848 	ch->cmt = cmt;  in sh_cmt_setup_channel()
849 	ch->index = index;  in sh_cmt_setup_channel()
850 	ch->hwidx = hwidx;  in sh_cmt_setup_channel()
851 	ch->timer_bit = hwidx;  in sh_cmt_setup_channel()
860 		ch->ioctrl = cmt->mapbase + 2 + ch->hwidx * 6;  in sh_cmt_setup_channel()
864 		ch->ioctrl = cmt->mapbase + 0x10 + ch->hwidx * 0x10;  in sh_cmt_setup_channel()
868 		ch->iostart = cmt->mapbase + ch->hwidx * 0x100;  in sh_cmt_setup_channel()
869 		ch->ioctrl = ch->iostart + 0x10;  in sh_cmt_setup_channel()
870 		ch->timer_bit = 0;  in sh_cmt_setup_channel()
874 	if (cmt->info->width == (sizeof(ch->max_match_value) * 8))  in sh_cmt_setup_channel()
875 		ch->max_match_value = ~0;  in sh_cmt_setup_channel()
877 		ch->max_match_value = (1 << cmt->info->width) - 1;  in sh_cmt_setup_channel()
879 	ch->match_value = ch->max_match_value;  in sh_cmt_setup_channel()
880 	raw_spin_lock_init(&ch->lock);  in sh_cmt_setup_channel()
882 	ret = sh_cmt_register(ch, dev_name(&cmt->pdev->dev),  in sh_cmt_setup_channel()
886 			ch->index);  in sh_cmt_setup_channel()
889 	ch->cs_enabled = false;  in sh_cmt_setup_channel()