Lines Matching refs:clk_base
868 static void __init periph_clk_init(void __iomem *clk_base, in periph_clk_init() argument
890 clk = tegra_clk_register_periph_data(clk_base, data); in periph_clk_init()
895 static void __init gate_clk_init(void __iomem *clk_base, in gate_clk_init() argument
913 clk_base, data->flags, in gate_clk_init()
920 static void __init div_clk_init(void __iomem *clk_base, in div_clk_init() argument
937 data->p.parent_name, clk_base + data->offset, in div_clk_init()
947 static void __init init_pllp(void __iomem *clk_base, void __iomem *pmc_base, in init_pllp() argument
958 clk = tegra_clk_register_pll("pll_p", "pll_ref", clk_base, in init_pllp()
974 clk_base + data->offset, 0, data->div_flags, in init_pllp()
977 data->div_name, clk_base + data->offset, in init_pllp()
995 "pll_p_out_cpu", clk_base + PLLP_OUTB, 0, 0, 24, in init_pllp()
1001 "pll_p_out4_div", clk_base + PLLP_OUTB, in init_pllp()
1014 clk_base + PLLP_MISC1, 29, 0, NULL); in init_pllp()
1023 CLK_IGNORE_UNUSED, clk_base + PLLP_MISC1, 28, 0, in init_pllp()
1030 void __init tegra_periph_clk_init(void __iomem *clk_base, in tegra_periph_clk_init() argument
1034 init_pllp(clk_base, pmc_base, tegra_clks, pll_params); in tegra_periph_clk_init()
1035 periph_clk_init(clk_base, tegra_clks); in tegra_periph_clk_init()
1036 gate_clk_init(clk_base, tegra_clks); in tegra_periph_clk_init()
1037 div_clk_init(clk_base, tegra_clks); in tegra_periph_clk_init()