230 #define pll_readl(offset, p) readl_relaxed(p->clk_base + offset)
237 #define pll_writel(val, offset, p) writel_relaxed(val, p->clk_base + offset)
302 	lock_addr = pll->clk_base;  in clk_pll_wait_for_lock()
979 	val = readl(pll->clk_base + PLLE_SS_CTRL);  in clk_plle_enable()
982 	writel(val, pll->clk_base + PLLE_SS_CTRL);  in clk_plle_enable()
1116 	value = readl_relaxed(pll->clk_base + UTMIP_PLL_CFG2);  in clk_pllu_enable()
1126 	writel_relaxed(value, pll->clk_base + UTMIP_PLL_CFG2);  in clk_pllu_enable()
1128 	value = readl_relaxed(pll->clk_base + UTMIP_PLL_CFG1);  in clk_pllu_enable()
1138 	writel_relaxed(value, pll->clk_base + UTMIP_PLL_CFG1);  in clk_pllu_enable()
1222 			       void __iomem *clk_base,  in _setup_dynamic_ramp()  argument
1252 	writel_relaxed(val, clk_base + pll_params->dyn_ramp_reg);  in _setup_dynamic_ramp()
1744 	value = readl_relaxed(pll->clk_base + UTMIP_PLL_CFG2);  in clk_pllu_tegra114_enable()
1754 	writel_relaxed(value, pll->clk_base + UTMIP_PLL_CFG2);  in clk_pllu_tegra114_enable()
1756 	value = readl_relaxed(pll->clk_base + UTMIP_PLL_CFG1);  in clk_pllu_tegra114_enable()
1767 	writel_relaxed(value, pll->clk_base + UTMIP_PLL_CFG1);  in clk_pllu_tegra114_enable()
1770 	value = readl_relaxed(pll->clk_base + UTMIPLL_HW_PWRDN_CFG0);  in clk_pllu_tegra114_enable()
1774 	writel_relaxed(value, pll->clk_base + UTMIPLL_HW_PWRDN_CFG0);  in clk_pllu_tegra114_enable()
1776 	value = readl_relaxed(pll->clk_base + UTMIP_PLL_CFG1);  in clk_pllu_tegra114_enable()
1779 	writel_relaxed(value, pll->clk_base + UTMIP_PLL_CFG1);  in clk_pllu_tegra114_enable()
1787 	value = readl_relaxed(pll->clk_base + UTMIPLL_HW_PWRDN_CFG0);  in clk_pllu_tegra114_enable()
1790 	writel_relaxed(value, pll->clk_base + UTMIPLL_HW_PWRDN_CFG0);  in clk_pllu_tegra114_enable()
1795 	value = readl_relaxed(pll->clk_base + UTMIPLL_HW_PWRDN_CFG0);  in clk_pllu_tegra114_enable()
1797 	writel_relaxed(value, pll->clk_base + UTMIPLL_HW_PWRDN_CFG0);  in clk_pllu_tegra114_enable()
1807 static struct tegra_clk_pll *_tegra_init_pll(void __iomem *clk_base,  in _tegra_init_pll()  argument
1817 	pll->clk_base = clk_base;  in _tegra_init_pll()
1859 		void __iomem *clk_base, void __iomem *pmc,  in tegra_clk_register_pll()  argument
1868 	pll = _tegra_init_pll(clk_base, pmc, pll_params, lock);  in tegra_clk_register_pll()
1890 		void __iomem *clk_base, void __iomem *pmc,  in tegra_clk_register_plle()  argument
1902 	pll = _tegra_init_pll(clk_base, pmc, pll_params, lock);  in tegra_clk_register_plle()
1915 		void __iomem *clk_base, unsigned long flags,  in tegra_clk_register_pllu()  argument
1923 	pll = _tegra_init_pll(clk_base, NULL, pll_params, lock);  in tegra_clk_register_pllu()
1981 			  void __iomem *clk_base, void __iomem *pmc,  in tegra_clk_register_pllxc()  argument
2016 		err = _setup_dynamic_ramp(pll_params, clk_base, parent_rate);  in tegra_clk_register_pllxc()
2020 		val = readl_relaxed(clk_base + pll_params->base_reg);  in tegra_clk_register_pllxc()
2021 		val_iddq = readl_relaxed(clk_base + pll_params->iddq_reg);  in tegra_clk_register_pllxc()
2028 				       clk_base + pll_params->iddq_reg);  in tegra_clk_register_pllxc()
2032 	pll = _tegra_init_pll(clk_base, pmc, pll_params, lock);  in tegra_clk_register_pllxc()
2045 			  void __iomem *clk_base, void __iomem *pmc,  in tegra_clk_register_pllre()  argument
2060 	pll = _tegra_init_pll(clk_base, pmc, pll_params, lock);  in tegra_clk_register_pllre()
2068 		WARN_ON(readl_relaxed(clk_base + pll_params->iddq_reg) &  in tegra_clk_register_pllre()
2094 			  void __iomem *clk_base, void __iomem *pmc,  in tegra_clk_register_pllm()  argument
2123 	pll = _tegra_init_pll(clk_base, pmc, pll_params, lock);  in tegra_clk_register_pllm()
2136 			  void __iomem *clk_base, void __iomem *pmc,  in tegra_clk_register_pllc()  argument
2162 	pll = _tegra_init_pll(clk_base, pmc, pll_params, lock);  in tegra_clk_register_pllc()
2211 				void __iomem *clk_base, unsigned long flags,  in tegra_clk_register_plle_tegra114()  argument
2219 	pll = _tegra_init_pll(clk_base, NULL, pll_params, lock);  in tegra_clk_register_plle_tegra114()
2249 				 void __iomem *clk_base, unsigned long flags,  in tegra_clk_register_pllu_tegra114()  argument
2258 	pll = _tegra_init_pll(clk_base, NULL, pll_params, lock);  in tegra_clk_register_pllu_tegra114()
2282 				void __iomem *clk_base, unsigned long flags,  in tegra_clk_register_pllss()  argument
2303 	pll = _tegra_init_pll(clk_base, NULL, pll_params, lock);  in tegra_clk_register_pllss()
2337 	val_iddq = readl_relaxed(clk_base + pll_params->iddq_reg);  in tegra_clk_register_pllss()
2346 		writel_relaxed(val_iddq, clk_base + pll_params->iddq_reg);  in tegra_clk_register_pllss()
2364 			  const char *parent_name, void __iomem *clk_base,  in tegra_clk_register_pllre_tegra210()  argument
2378 	pll = _tegra_init_pll(clk_base, pmc, pll_params, lock);  in tegra_clk_register_pllre_tegra210()
2532 				void __iomem *clk_base, unsigned long flags,  in tegra_clk_register_plle_tegra210()  argument
2540 	pll = _tegra_init_pll(clk_base, NULL, pll_params, lock);  in tegra_clk_register_plle_tegra210()
2569 			const char *parent_name, void __iomem *clk_base,  in tegra_clk_register_pllc_tegra210()  argument
2598 	pll = _tegra_init_pll(clk_base, pmc, pll_params, lock);  in tegra_clk_register_pllc_tegra210()
2611 				const char *parent_name, void __iomem *clk_base,  in tegra_clk_register_pllss_tegra210()  argument
2631 	val = readl_relaxed(clk_base + pll_params->base_reg);  in tegra_clk_register_pllss_tegra210()
2646 	pll = _tegra_init_pll(clk_base, NULL, pll_params, lock);  in tegra_clk_register_pllss_tegra210()
2660 			  void __iomem *clk_base, void __iomem *pmc,  in tegra_clk_register_pllmb()  argument
2689 	pll = _tegra_init_pll(clk_base, pmc, pll_params, lock);  in tegra_clk_register_pllmb()