Lines Matching refs:__clk_get_name
201 pr_debug("%s:%s enabled\n", __clk_get_name(hw->clk), __func__); in __clkgen_pll_enable()
236 pr_debug("%s:%s disabled\n", __clk_get_name(hw->clk), __func__); in __clkgen_pll_disable()
345 __clk_get_name(hw->clk), rate); in round_rate_stm_pll3200c32()
350 __func__, __clk_get_name(hw->clk), in round_rate_stm_pll3200c32()
372 __func__, __clk_get_name(hw->clk), in set_rate_stm_pll3200c32()
485 pr_debug("%s:%s rate %lu\n", __clk_get_name(hw->clk), __func__, rate); in recalc_stm_pll4600c28()
499 __clk_get_name(hw->clk), rate); in round_rate_stm_pll4600c28()
504 __func__, __clk_get_name(hw->clk), in round_rate_stm_pll4600c28()
526 __clk_get_name(hw->clk), rate); in set_rate_stm_pll4600c28()
531 __func__, __clk_get_name(hw->clk), in set_rate_stm_pll4600c28()
614 __clk_get_name(clk), in clkgen_pll_register()
615 __clk_get_name(clk_get_parent(clk)), in clkgen_pll_register()
681 __clk_get_name(clk), in clkgen_odf_register()
682 __clk_get_name(clk_get_parent(clk)), in clkgen_odf_register()
714 pll_name = __clk_get_name(clk); in clkgen_c32_pll_setup()