37 	unsigned long sdiv;  member
60 	struct clkgen_field sdiv[QUADFS_MAX_CHAN];  member
105 	.sdiv	= { CLKGEN_FIELD(0x304, 0xf, 20),
129 	.sdiv	= { CLKGEN_FIELD(0x2b4, 0xf, 20),
464 	u32 sdiv;  member
494 	CLKGEN_WRITE(fs, sdiv[fs->chan], fs->sdiv);  in quadfs_fsynth_program_rate()
563 	unsigned long s = (1 << fs->sdiv);  in clk_fs660c32_dig_get_rate()
603 	fs_tmp.sdiv = si;  in clk_fs660c32_get_pe()
613 		fs->sdiv = si;  in clk_fs660c32_get_pe()
658 		fs_tmp.sdiv = fs->sdiv;  in clk_fs660c32_dig_get_params()
692 	params->sdiv	= CLKGEN_READ(fs, sdiv[fs->chan]);  in quadfs_fsynt_get_hw_value_for_recalc()
702 	if (!params->mdiv && !params->pe && !params->sdiv)  in quadfs_fsynt_get_hw_value_for_recalc()
707 	fs->sdiv = params->sdiv;  in quadfs_fsynt_get_hw_value_for_recalc()
764 		 rate, (unsigned int)params.sdiv, (unsigned int)params.mdiv,  in quadfs_round_rate()
776 	fs->sdiv = params->sdiv;  in quadfs_program_and_enable()