Lines Matching refs:ENABLE_PCLK_PERIC0
1552 #define ENABLE_PCLK_PERIC0 0x0900 macro
1562 ENABLE_PCLK_PERIC0,
1572 { ENABLE_PCLK_PERIC0, 0xe00ff000 },
1595 GATE(CLK_PCLK_SCI, "pclk_sci", "aclk_peric_66", ENABLE_PCLK_PERIC0,
1598 ENABLE_PCLK_PERIC0, 30, CLK_IGNORE_UNUSED, 0),
1600 ENABLE_PCLK_PERIC0, 29, CLK_IGNORE_UNUSED, 0),
1601 GATE(CLK_PCLK_PWM, "pclk_pwm", "aclk_peric_66", ENABLE_PCLK_PERIC0,
1603 GATE(CLK_PCLK_SPDIF, "pclk_spdif", "aclk_peric_66", ENABLE_PCLK_PERIC0,
1605 GATE(CLK_PCLK_PCM1, "pclk_pcm1", "aclk_peric_66", ENABLE_PCLK_PERIC0,
1607 GATE(CLK_PCLK_I2S1, "pclk_i2s", "aclk_peric_66", ENABLE_PCLK_PERIC0,
1609 GATE(CLK_PCLK_SPI2, "pclk_spi2", "aclk_peric_66", ENABLE_PCLK_PERIC0,
1611 GATE(CLK_PCLK_SPI1, "pclk_spi1", "aclk_peric_66", ENABLE_PCLK_PERIC0,
1613 GATE(CLK_PCLK_SPI0, "pclk_spi0", "aclk_peric_66", ENABLE_PCLK_PERIC0,
1615 GATE(CLK_PCLK_ADCIF, "pclk_adcif", "aclk_peric_66", ENABLE_PCLK_PERIC0,
1618 ENABLE_PCLK_PERIC0, 19, CLK_IGNORE_UNUSED, 0),
1620 ENABLE_PCLK_PERIC0, 18, CLK_IGNORE_UNUSED, 0),
1622 ENABLE_PCLK_PERIC0, 17, CLK_IGNORE_UNUSED, 0),
1624 ENABLE_PCLK_PERIC0, 16, CLK_SET_RATE_PARENT, 0),
1626 ENABLE_PCLK_PERIC0, 15,
1628 GATE(CLK_PCLK_UART2, "pclk_uart2", "aclk_peric_66", ENABLE_PCLK_PERIC0,
1630 GATE(CLK_PCLK_UART1, "pclk_uart1", "aclk_peric_66", ENABLE_PCLK_PERIC0,
1632 GATE(CLK_PCLK_UART0, "pclk_uart0", "aclk_peric_66", ENABLE_PCLK_PERIC0,
1635 ENABLE_PCLK_PERIC0, 11, CLK_SET_RATE_PARENT, 0),
1637 ENABLE_PCLK_PERIC0, 10, CLK_SET_RATE_PARENT, 0),
1639 ENABLE_PCLK_PERIC0, 9, CLK_SET_RATE_PARENT, 0),
1641 ENABLE_PCLK_PERIC0, 8, CLK_SET_RATE_PARENT, 0),
1642 GATE(CLK_PCLK_I2C7, "pclk_i2c7", "aclk_peric_66", ENABLE_PCLK_PERIC0,
1644 GATE(CLK_PCLK_I2C6, "pclk_i2c6", "aclk_peric_66", ENABLE_PCLK_PERIC0,
1646 GATE(CLK_PCLK_I2C5, "pclk_i2c5", "aclk_peric_66", ENABLE_PCLK_PERIC0,
1648 GATE(CLK_PCLK_I2C4, "pclk_i2c4", "aclk_peric_66", ENABLE_PCLK_PERIC0,
1650 GATE(CLK_PCLK_I2C3, "pclk_i2c3", "aclk_peric_66", ENABLE_PCLK_PERIC0,
1652 GATE(CLK_PCLK_I2C2, "pclk_i2c2", "aclk_peric_66", ENABLE_PCLK_PERIC0,
1654 GATE(CLK_PCLK_I2C1, "pclk_i2c1", "aclk_peric_66", ENABLE_PCLK_PERIC0,
1656 GATE(CLK_PCLK_I2C0, "pclk_i2c0", "aclk_peric_66", ENABLE_PCLK_PERIC0,