Lines Matching refs:reg_base
22 static void __iomem *reg_base; variable
47 reg_save[i][1] = readl(reg_base + reg_save[i][0]); in exynos_audss_clk_suspend()
57 writel(reg_save[i][1], reg_base + reg_save[i][0]); in exynos_audss_clk_resume()
141 reg_base = devm_ioremap_resource(dev, res); in exynos_audss_clk_probe()
142 if (IS_ERR(reg_base)) in exynos_audss_clk_probe()
143 return PTR_ERR(reg_base); in exynos_audss_clk_probe()
189 reg_base + ASS_CLK_SRC, 0, 1, 0, &lock); in exynos_audss_clk_probe()
200 reg_base + ASS_CLK_SRC, 2, 2, 0, &lock); in exynos_audss_clk_probe()
204 reg_base + ASS_CLK_DIV, 0, 4, 0, &lock); in exynos_audss_clk_probe()
208 reg_base + ASS_CLK_DIV, 4, 4, 0, &lock); in exynos_audss_clk_probe()
211 "mout_i2s", 0, reg_base + ASS_CLK_DIV, 8, 4, 0, in exynos_audss_clk_probe()
216 reg_base + ASS_CLK_GATE, 0, 0, &lock); in exynos_audss_clk_probe()
220 reg_base + ASS_CLK_GATE, 2, 0, &lock); in exynos_audss_clk_probe()
224 reg_base + ASS_CLK_GATE, 3, 0, &lock); in exynos_audss_clk_probe()
228 reg_base + ASS_CLK_GATE, 4, 0, &lock); in exynos_audss_clk_probe()
235 reg_base + ASS_CLK_GATE, 5, 0, &lock); in exynos_audss_clk_probe()
240 reg_base + ASS_CLK_GATE, 9, 0, &lock); in exynos_audss_clk_probe()