Lines Matching refs:COMPOSITE
285 COMPOSITE(ACLK_VEPU, "aclk_vepu", mux_pll_src_cpll_gpll_p, 0,
290 COMPOSITE(ACLK_VDPU, "aclk_vdpu", mux_pll_src_cpll_gpll_p, 0,
298 COMPOSITE(0, "ddrphy", mux_ddrphy_p, CLK_IGNORE_UNUSED,
312 COMPOSITE(0, "aclk_lcdc0_pre", mux_pll_src_cpll_gpll_p, CLK_IGNORE_UNUSED,
315 COMPOSITE(0, "aclk_lcdc1_pre", mux_pll_src_cpll_gpll_p, 0,
352 COMPOSITE(0, "mac_src", mux_mac_p, 0,
360 COMPOSITE(0, "hsadc_src", mux_pll_src_gpll_cpll_p, 0,
574 COMPOSITE(0, "aclk_peri_pre", mux_pll_src_gpll_cpll_p, 0,
578 COMPOSITE(0, "dclk_lcdc0_src", mux_pll_src_cpll_gpll_p, 0,
583 COMPOSITE(0, "dclk_lcdc1_src", mux_pll_src_cpll_gpll_p, 0,
600 COMPOSITE(0, "aclk_gpu_src", mux_pll_src_cpll_gpll_p, 0,
692 COMPOSITE(0, "aclk_peri_pre", mux_pll_src_cpll_gpll_p, 0,
696 COMPOSITE(DCLK_LCDC0, "dclk_lcdc0", mux_pll_src_cpll_gpll_p, 0,
699 COMPOSITE(DCLK_LCDC1, "dclk_lcdc1", mux_pll_src_cpll_gpll_p, 0,
703 COMPOSITE(0, "aclk_gpu_src", mux_pll_src_cpll_gpll_p, 0,