350 static void armada_3700_pm_dvfs_update_regs(unsigned int load_level,  in armada_3700_pm_dvfs_update_regs()  argument
354 	if (load_level <= ARMADA_37XX_DVFS_LOAD_1)  in armada_3700_pm_dvfs_update_regs()
359 	if (load_level == ARMADA_37XX_DVFS_LOAD_0 ||  in armada_3700_pm_dvfs_update_regs()
360 	    load_level ==  ARMADA_37XX_DVFS_LOAD_2)  in armada_3700_pm_dvfs_update_regs()
380 	unsigned int load_level, div;  in armada_3700_pm_dvfs_get_cpu_div()  local
387 	regmap_read(base, reg, &load_level);  in armada_3700_pm_dvfs_get_cpu_div()
393 	load_level &= ARMADA_37XX_NB_CPU_LOAD_MASK;  in armada_3700_pm_dvfs_get_cpu_div()
394 	armada_3700_pm_dvfs_update_regs(load_level, &reg, &offset);  in armada_3700_pm_dvfs_get_cpu_div()
405 	unsigned int load_level, sel;  in armada_3700_pm_dvfs_get_cpu_parent()  local
412 	regmap_read(base, reg, &load_level);  in armada_3700_pm_dvfs_get_cpu_parent()
418 	load_level &= ARMADA_37XX_NB_CPU_LOAD_MASK;  in armada_3700_pm_dvfs_get_cpu_parent()
419 	armada_3700_pm_dvfs_update_regs(load_level, &reg, &offset);  in armada_3700_pm_dvfs_get_cpu_parent()
445 	int load_level;  in clk_pm_cpu_set_parent()  local
455 	for (load_level = 0; load_level < LOAD_LEVEL_NR; load_level++) {  in clk_pm_cpu_set_parent()
459 		armada_3700_pm_dvfs_update_regs(load_level, &reg, &offset);  in clk_pm_cpu_set_parent()
487 	unsigned int load_level;  in clk_pm_cpu_round_rate()  local
492 	for (load_level = 0; load_level < LOAD_LEVEL_NR; load_level++) {  in clk_pm_cpu_round_rate()
495 		armada_3700_pm_dvfs_update_regs(load_level, &reg, &offset);  in clk_pm_cpu_round_rate()
554 	unsigned int load_level;  in clk_pm_cpu_set_rate()  local
560 	for (load_level = 0; load_level < LOAD_LEVEL_NR; load_level++) {  in clk_pm_cpu_set_rate()
564 		armada_3700_pm_dvfs_update_regs(load_level, &reg, &offset);  in clk_pm_cpu_set_rate()
581 			regmap_update_bits(base, reg, mask, load_level);  in clk_pm_cpu_set_rate()