45 static DEFINE_SPINLOCK(clk_lock);
164 				ARRAY_SIZE(uart_factor_tbl), &clk_lock);  in pxa910_clk_init()
169 				apbc_base + APBC_TWSI0, 10, 0, &clk_lock);  in pxa910_clk_init()
173 				apbcp_base + APBCP_TWSI1, 10, 0, &clk_lock);  in pxa910_clk_init()
177 				apbc_base + APBC_GPIO, 10, 0, &clk_lock);  in pxa910_clk_init()
181 				apbc_base + APBC_KPC, 10, 0, &clk_lock);  in pxa910_clk_init()
185 				apbc_base + APBC_RTC, 10, 0, &clk_lock);  in pxa910_clk_init()
189 				apbc_base + APBC_PWM0, 10, 0, &clk_lock);  in pxa910_clk_init()
193 				apbc_base + APBC_PWM1, 10, 0, &clk_lock);  in pxa910_clk_init()
197 				apbc_base + APBC_PWM2, 10, 0, &clk_lock);  in pxa910_clk_init()
201 				apbc_base + APBC_PWM3, 10, 0, &clk_lock);  in pxa910_clk_init()
207 				apbc_base + APBC_UART0, 4, 3, 0, &clk_lock);  in pxa910_clk_init()
212 				apbc_base + APBC_UART0, 10, 0, &clk_lock);  in pxa910_clk_init()
218 				apbc_base + APBC_UART1, 4, 3, 0, &clk_lock);  in pxa910_clk_init()
223 				apbc_base + APBC_UART1, 10, 0, &clk_lock);  in pxa910_clk_init()
229 				apbcp_base + APBCP_UART2, 4, 3, 0, &clk_lock);  in pxa910_clk_init()
234 				apbcp_base + APBCP_UART2, 10, 0, &clk_lock);  in pxa910_clk_init()
240 				apbc_base + APBC_SSP0, 4, 3, 0, &clk_lock);  in pxa910_clk_init()
244 				apbc_base + APBC_SSP0, 10, 0, &clk_lock);  in pxa910_clk_init()
250 				apbc_base + APBC_SSP1, 4, 3, 0, &clk_lock);  in pxa910_clk_init()
254 				apbc_base + APBC_SSP1, 10, 0, &clk_lock);  in pxa910_clk_init()
258 				apmu_base + APMU_DFC, 0x19b, &clk_lock);  in pxa910_clk_init()
264 				apmu_base + APMU_SDH0, 6, 1, 0, &clk_lock);  in pxa910_clk_init()
268 				apmu_base + APMU_SDH0, 0x1b, &clk_lock);  in pxa910_clk_init()
274 				apmu_base + APMU_SDH1, 6, 1, 0, &clk_lock);  in pxa910_clk_init()
278 				apmu_base + APMU_SDH1, 0x1b, &clk_lock);  in pxa910_clk_init()
282 				apmu_base + APMU_USB, 0x9, &clk_lock);  in pxa910_clk_init()
286 				apmu_base + APMU_USB, 0x12, &clk_lock);  in pxa910_clk_init()
292 				apmu_base + APMU_DISP0, 6, 1, 0, &clk_lock);  in pxa910_clk_init()
296 				apmu_base + APMU_DISP0, 0x1b, &clk_lock);  in pxa910_clk_init()
302 				apmu_base + APMU_CCIC0, 6, 1, 0, &clk_lock);  in pxa910_clk_init()
306 				apmu_base + APMU_CCIC0, 0x1b, &clk_lock);  in pxa910_clk_init()
312 				apmu_base + APMU_CCIC0, 7, 1, 0, &clk_lock);  in pxa910_clk_init()
316 				apmu_base + APMU_CCIC0, 0x24, &clk_lock);  in pxa910_clk_init()
321 				10, 5, 0, &clk_lock);  in pxa910_clk_init()
325 				apmu_base + APMU_CCIC0, 0x300, &clk_lock);  in pxa910_clk_init()