63 	struct clk_regmap_div_data *div = clk_get_regmap_div_data(clk);  in clk_regmap_div_recalc_rate()  local
67 	ret = regmap_read(clk->map, div->offset, &val);  in clk_regmap_div_recalc_rate()
72 	val >>= div->shift;  in clk_regmap_div_recalc_rate()
73 	val &= clk_div_mask(div->width);  in clk_regmap_div_recalc_rate()
74 	return divider_recalc_rate(hw, prate, val, div->table, div->flags,  in clk_regmap_div_recalc_rate()
75 				   div->width);  in clk_regmap_div_recalc_rate()
82 	struct clk_regmap_div_data *div = clk_get_regmap_div_data(clk);  in clk_regmap_div_round_rate()  local
87 	if (div->flags & CLK_DIVIDER_READ_ONLY) {  in clk_regmap_div_round_rate()
88 		ret = regmap_read(clk->map, div->offset, &val);  in clk_regmap_div_round_rate()
93 		val >>= div->shift;  in clk_regmap_div_round_rate()
94 		val &= clk_div_mask(div->width);  in clk_regmap_div_round_rate()
96 		return divider_ro_round_rate(hw, rate, prate, div->table,  in clk_regmap_div_round_rate()
97 					     div->width, div->flags, val);  in clk_regmap_div_round_rate()
100 	return divider_round_rate(hw, rate, prate, div->table, div->width,  in clk_regmap_div_round_rate()
101 				  div->flags);  in clk_regmap_div_round_rate()
108 	struct clk_regmap_div_data *div = clk_get_regmap_div_data(clk);  in clk_regmap_div_set_rate()  local
112 	ret = divider_get_val(rate, parent_rate, div->table, div->width,  in clk_regmap_div_set_rate()
113 			      div->flags);  in clk_regmap_div_set_rate()
117 	val = (unsigned int)ret << div->shift;  in clk_regmap_div_set_rate()
118 	return regmap_update_bits(clk->map, div->offset,  in clk_regmap_div_set_rate()
119 				  clk_div_mask(div->width) << div->shift, val);  in clk_regmap_div_set_rate()