Lines Matching full:hw
33 .hw.init = &(struct clk_init_data) { \
36 .parent_hws = (const struct clk_hw *[]) { &_phws.hw }, \
50 .hw.init = &(struct clk_init_data){ \
67 .hw.init = &(struct clk_init_data){ \
70 .parent_hws = (const struct clk_hw *[]) { &_phws.hw }, \
82 .hw.init = &(struct clk_init_data) { \
213 .hw.init = &(struct clk_init_data) { \
216 .parent_hws = (const struct clk_hw *[]) { &_phws.hw }, \
265 .hw.init = &(struct clk_init_data) { \
268 .parent_hws = (const struct clk_hw *[]) { &_phws.hw }, \
308 { .hw = &aud_mst_a_sclk.hw, },
309 { .hw = &aud_mst_b_sclk.hw, },
310 { .hw = &aud_mst_c_sclk.hw, },
311 { .hw = &aud_mst_d_sclk.hw, },
312 { .hw = &aud_mst_e_sclk.hw, },
313 { .hw = &aud_mst_f_sclk.hw, },
372 .hw.init = &(struct clk_init_data) { \
376 &aud_tdm##_name##_sclk_post_en.hw \
392 { .hw = &aud_mst_a_lrclk.hw, },
393 { .hw = &aud_mst_b_lrclk.hw, },
394 { .hw = &aud_mst_c_lrclk.hw, },
395 { .hw = &aud_mst_d_lrclk.hw, },
396 { .hw = &aud_mst_e_lrclk.hw, },
397 { .hw = &aud_mst_f_lrclk.hw, },
429 { .hw = &aud_mst_a_mclk.hw },
430 { .hw = &aud_mst_b_mclk.hw },
431 { .hw = &aud_mst_c_mclk.hw },
432 { .hw = &aud_mst_d_mclk.hw },
433 { .hw = &aud_mst_e_mclk.hw },
434 { .hw = &aud_mst_f_mclk.hw },
443 { .hw = &aud_mst_a_lrclk.hw },
444 { .hw = &aud_mst_b_lrclk.hw },
445 { .hw = &aud_mst_c_lrclk.hw },
446 { .hw = &aud_mst_d_lrclk.hw },
447 { .hw = &aud_mst_e_lrclk.hw },
448 { .hw = &aud_mst_f_lrclk.hw },
459 { .hw = &aud_mst_a_sclk.hw },
460 { .hw = &aud_mst_b_sclk.hw },
461 { .hw = &aud_mst_c_sclk.hw },
462 { .hw = &aud_mst_d_sclk.hw },
463 { .hw = &aud_mst_e_sclk.hw },
464 { .hw = &aud_mst_f_sclk.hw },
480 [AUD_CLKID_DDR_ARB] = &aud_ddr_arb.hw,
481 [AUD_CLKID_PDM] = &aud_pdm.hw,
482 [AUD_CLKID_TDMIN_A] = &aud_tdmin_a.hw,
483 [AUD_CLKID_TDMIN_B] = &aud_tdmin_b.hw,
484 [AUD_CLKID_TDMIN_C] = &aud_tdmin_c.hw,
485 [AUD_CLKID_TDMIN_LB] = &aud_tdmin_lb.hw,
486 [AUD_CLKID_TDMOUT_A] = &aud_tdmout_a.hw,
487 [AUD_CLKID_TDMOUT_B] = &aud_tdmout_b.hw,
488 [AUD_CLKID_TDMOUT_C] = &aud_tdmout_c.hw,
489 [AUD_CLKID_FRDDR_A] = &aud_frddr_a.hw,
490 [AUD_CLKID_FRDDR_B] = &aud_frddr_b.hw,
491 [AUD_CLKID_FRDDR_C] = &aud_frddr_c.hw,
492 [AUD_CLKID_TODDR_A] = &aud_toddr_a.hw,
493 [AUD_CLKID_TODDR_B] = &aud_toddr_b.hw,
494 [AUD_CLKID_TODDR_C] = &aud_toddr_c.hw,
495 [AUD_CLKID_LOOPBACK] = &aud_loopback.hw,
496 [AUD_CLKID_SPDIFIN] = &aud_spdifin.hw,
497 [AUD_CLKID_SPDIFOUT] = &aud_spdifout.hw,
498 [AUD_CLKID_RESAMPLE] = &aud_resample.hw,
499 [AUD_CLKID_POWER_DETECT] = &aud_power_detect.hw,
500 [AUD_CLKID_MST_A_MCLK_SEL] = &aud_mst_a_mclk_sel.hw,
501 [AUD_CLKID_MST_B_MCLK_SEL] = &aud_mst_b_mclk_sel.hw,
502 [AUD_CLKID_MST_C_MCLK_SEL] = &aud_mst_c_mclk_sel.hw,
503 [AUD_CLKID_MST_D_MCLK_SEL] = &aud_mst_d_mclk_sel.hw,
504 [AUD_CLKID_MST_E_MCLK_SEL] = &aud_mst_e_mclk_sel.hw,
505 [AUD_CLKID_MST_F_MCLK_SEL] = &aud_mst_f_mclk_sel.hw,
506 [AUD_CLKID_MST_A_MCLK_DIV] = &aud_mst_a_mclk_div.hw,
507 [AUD_CLKID_MST_B_MCLK_DIV] = &aud_mst_b_mclk_div.hw,
508 [AUD_CLKID_MST_C_MCLK_DIV] = &aud_mst_c_mclk_div.hw,
509 [AUD_CLKID_MST_D_MCLK_DIV] = &aud_mst_d_mclk_div.hw,
510 [AUD_CLKID_MST_E_MCLK_DIV] = &aud_mst_e_mclk_div.hw,
511 [AUD_CLKID_MST_F_MCLK_DIV] = &aud_mst_f_mclk_div.hw,
512 [AUD_CLKID_MST_A_MCLK] = &aud_mst_a_mclk.hw,
513 [AUD_CLKID_MST_B_MCLK] = &aud_mst_b_mclk.hw,
514 [AUD_CLKID_MST_C_MCLK] = &aud_mst_c_mclk.hw,
515 [AUD_CLKID_MST_D_MCLK] = &aud_mst_d_mclk.hw,
516 [AUD_CLKID_MST_E_MCLK] = &aud_mst_e_mclk.hw,
517 [AUD_CLKID_MST_F_MCLK] = &aud_mst_f_mclk.hw,
518 [AUD_CLKID_SPDIFOUT_CLK_SEL] = &aud_spdifout_clk_sel.hw,
519 [AUD_CLKID_SPDIFOUT_CLK_DIV] = &aud_spdifout_clk_div.hw,
520 [AUD_CLKID_SPDIFOUT_CLK] = &aud_spdifout_clk.hw,
521 [AUD_CLKID_SPDIFIN_CLK_SEL] = &aud_spdifin_clk_sel.hw,
522 [AUD_CLKID_SPDIFIN_CLK_DIV] = &aud_spdifin_clk_div.hw,
523 [AUD_CLKID_SPDIFIN_CLK] = &aud_spdifin_clk.hw,
524 [AUD_CLKID_PDM_DCLK_SEL] = &aud_pdm_dclk_sel.hw,
525 [AUD_CLKID_PDM_DCLK_DIV] = &aud_pdm_dclk_div.hw,
526 [AUD_CLKID_PDM_DCLK] = &aud_pdm_dclk.hw,
527 [AUD_CLKID_PDM_SYSCLK_SEL] = &aud_pdm_sysclk_sel.hw,
528 [AUD_CLKID_PDM_SYSCLK_DIV] = &aud_pdm_sysclk_div.hw,
529 [AUD_CLKID_PDM_SYSCLK] = &aud_pdm_sysclk.hw,
530 [AUD_CLKID_MST_A_SCLK_PRE_EN] = &aud_mst_a_sclk_pre_en.hw,
531 [AUD_CLKID_MST_B_SCLK_PRE_EN] = &aud_mst_b_sclk_pre_en.hw,
532 [AUD_CLKID_MST_C_SCLK_PRE_EN] = &aud_mst_c_sclk_pre_en.hw,
533 [AUD_CLKID_MST_D_SCLK_PRE_EN] = &aud_mst_d_sclk_pre_en.hw,
534 [AUD_CLKID_MST_E_SCLK_PRE_EN] = &aud_mst_e_sclk_pre_en.hw,
535 [AUD_CLKID_MST_F_SCLK_PRE_EN] = &aud_mst_f_sclk_pre_en.hw,
536 [AUD_CLKID_MST_A_SCLK_DIV] = &aud_mst_a_sclk_div.hw,
537 [AUD_CLKID_MST_B_SCLK_DIV] = &aud_mst_b_sclk_div.hw,
538 [AUD_CLKID_MST_C_SCLK_DIV] = &aud_mst_c_sclk_div.hw,
539 [AUD_CLKID_MST_D_SCLK_DIV] = &aud_mst_d_sclk_div.hw,
540 [AUD_CLKID_MST_E_SCLK_DIV] = &aud_mst_e_sclk_div.hw,
541 [AUD_CLKID_MST_F_SCLK_DIV] = &aud_mst_f_sclk_div.hw,
542 [AUD_CLKID_MST_A_SCLK_POST_EN] = &aud_mst_a_sclk_post_en.hw,
543 [AUD_CLKID_MST_B_SCLK_POST_EN] = &aud_mst_b_sclk_post_en.hw,
544 [AUD_CLKID_MST_C_SCLK_POST_EN] = &aud_mst_c_sclk_post_en.hw,
545 [AUD_CLKID_MST_D_SCLK_POST_EN] = &aud_mst_d_sclk_post_en.hw,
546 [AUD_CLKID_MST_E_SCLK_POST_EN] = &aud_mst_e_sclk_post_en.hw,
547 [AUD_CLKID_MST_F_SCLK_POST_EN] = &aud_mst_f_sclk_post_en.hw,
548 [AUD_CLKID_MST_A_SCLK] = &aud_mst_a_sclk.hw,
549 [AUD_CLKID_MST_B_SCLK] = &aud_mst_b_sclk.hw,
550 [AUD_CLKID_MST_C_SCLK] = &aud_mst_c_sclk.hw,
551 [AUD_CLKID_MST_D_SCLK] = &aud_mst_d_sclk.hw,
552 [AUD_CLKID_MST_E_SCLK] = &aud_mst_e_sclk.hw,
553 [AUD_CLKID_MST_F_SCLK] = &aud_mst_f_sclk.hw,
554 [AUD_CLKID_MST_A_LRCLK_DIV] = &aud_mst_a_lrclk_div.hw,
555 [AUD_CLKID_MST_B_LRCLK_DIV] = &aud_mst_b_lrclk_div.hw,
556 [AUD_CLKID_MST_C_LRCLK_DIV] = &aud_mst_c_lrclk_div.hw,
557 [AUD_CLKID_MST_D_LRCLK_DIV] = &aud_mst_d_lrclk_div.hw,
558 [AUD_CLKID_MST_E_LRCLK_DIV] = &aud_mst_e_lrclk_div.hw,
559 [AUD_CLKID_MST_F_LRCLK_DIV] = &aud_mst_f_lrclk_div.hw,
560 [AUD_CLKID_MST_A_LRCLK] = &aud_mst_a_lrclk.hw,
561 [AUD_CLKID_MST_B_LRCLK] = &aud_mst_b_lrclk.hw,
562 [AUD_CLKID_MST_C_LRCLK] = &aud_mst_c_lrclk.hw,
563 [AUD_CLKID_MST_D_LRCLK] = &aud_mst_d_lrclk.hw,
564 [AUD_CLKID_MST_E_LRCLK] = &aud_mst_e_lrclk.hw,
565 [AUD_CLKID_MST_F_LRCLK] = &aud_mst_f_lrclk.hw,
566 [AUD_CLKID_TDMIN_A_SCLK_SEL] = &aud_tdmin_a_sclk_sel.hw,
567 [AUD_CLKID_TDMIN_B_SCLK_SEL] = &aud_tdmin_b_sclk_sel.hw,
568 [AUD_CLKID_TDMIN_C_SCLK_SEL] = &aud_tdmin_c_sclk_sel.hw,
569 [AUD_CLKID_TDMIN_LB_SCLK_SEL] = &aud_tdmin_lb_sclk_sel.hw,
570 [AUD_CLKID_TDMOUT_A_SCLK_SEL] = &aud_tdmout_a_sclk_sel.hw,
571 [AUD_CLKID_TDMOUT_B_SCLK_SEL] = &aud_tdmout_b_sclk_sel.hw,
572 [AUD_CLKID_TDMOUT_C_SCLK_SEL] = &aud_tdmout_c_sclk_sel.hw,
573 [AUD_CLKID_TDMIN_A_SCLK_PRE_EN] = &aud_tdmin_a_sclk_pre_en.hw,
574 [AUD_CLKID_TDMIN_B_SCLK_PRE_EN] = &aud_tdmin_b_sclk_pre_en.hw,
575 [AUD_CLKID_TDMIN_C_SCLK_PRE_EN] = &aud_tdmin_c_sclk_pre_en.hw,
576 [AUD_CLKID_TDMIN_LB_SCLK_PRE_EN] = &aud_tdmin_lb_sclk_pre_en.hw,
577 [AUD_CLKID_TDMOUT_A_SCLK_PRE_EN] = &aud_tdmout_a_sclk_pre_en.hw,
578 [AUD_CLKID_TDMOUT_B_SCLK_PRE_EN] = &aud_tdmout_b_sclk_pre_en.hw,
579 [AUD_CLKID_TDMOUT_C_SCLK_PRE_EN] = &aud_tdmout_c_sclk_pre_en.hw,
580 [AUD_CLKID_TDMIN_A_SCLK_POST_EN] = &aud_tdmin_a_sclk_post_en.hw,
581 [AUD_CLKID_TDMIN_B_SCLK_POST_EN] = &aud_tdmin_b_sclk_post_en.hw,
582 [AUD_CLKID_TDMIN_C_SCLK_POST_EN] = &aud_tdmin_c_sclk_post_en.hw,
583 [AUD_CLKID_TDMIN_LB_SCLK_POST_EN] = &aud_tdmin_lb_sclk_post_en.hw,
584 [AUD_CLKID_TDMOUT_A_SCLK_POST_EN] = &aud_tdmout_a_sclk_post_en.hw,
585 [AUD_CLKID_TDMOUT_B_SCLK_POST_EN] = &aud_tdmout_b_sclk_post_en.hw,
586 [AUD_CLKID_TDMOUT_C_SCLK_POST_EN] = &aud_tdmout_c_sclk_post_en.hw,
587 [AUD_CLKID_TDMIN_A_SCLK] = &aud_tdmin_a_sclk.hw,
588 [AUD_CLKID_TDMIN_B_SCLK] = &aud_tdmin_b_sclk.hw,
589 [AUD_CLKID_TDMIN_C_SCLK] = &aud_tdmin_c_sclk.hw,
590 [AUD_CLKID_TDMIN_LB_SCLK] = &aud_tdmin_lb_sclk.hw,
591 [AUD_CLKID_TDMOUT_A_SCLK] = &aud_tdmout_a_sclk.hw,
592 [AUD_CLKID_TDMOUT_B_SCLK] = &aud_tdmout_b_sclk.hw,
593 [AUD_CLKID_TDMOUT_C_SCLK] = &aud_tdmout_c_sclk.hw,
594 [AUD_CLKID_TDMIN_A_LRCLK] = &aud_tdmin_a_lrclk.hw,
595 [AUD_CLKID_TDMIN_B_LRCLK] = &aud_tdmin_b_lrclk.hw,
596 [AUD_CLKID_TDMIN_C_LRCLK] = &aud_tdmin_c_lrclk.hw,
597 [AUD_CLKID_TDMIN_LB_LRCLK] = &aud_tdmin_lb_lrclk.hw,
598 [AUD_CLKID_TDMOUT_A_LRCLK] = &aud_tdmout_a_lrclk.hw,
599 [AUD_CLKID_TDMOUT_B_LRCLK] = &aud_tdmout_b_lrclk.hw,
600 [AUD_CLKID_TDMOUT_C_LRCLK] = &aud_tdmout_c_lrclk.hw,
612 [AUD_CLKID_DDR_ARB] = &aud_ddr_arb.hw,
613 [AUD_CLKID_PDM] = &aud_pdm.hw,
614 [AUD_CLKID_TDMIN_A] = &aud_tdmin_a.hw,
615 [AUD_CLKID_TDMIN_B] = &aud_tdmin_b.hw,
616 [AUD_CLKID_TDMIN_C] = &aud_tdmin_c.hw,
617 [AUD_CLKID_TDMIN_LB] = &aud_tdmin_lb.hw,
618 [AUD_CLKID_TDMOUT_A] = &aud_tdmout_a.hw,
619 [AUD_CLKID_TDMOUT_B] = &aud_tdmout_b.hw,
620 [AUD_CLKID_TDMOUT_C] = &aud_tdmout_c.hw,
621 [AUD_CLKID_FRDDR_A] = &aud_frddr_a.hw,
622 [AUD_CLKID_FRDDR_B] = &aud_frddr_b.hw,
623 [AUD_CLKID_FRDDR_C] = &aud_frddr_c.hw,
624 [AUD_CLKID_TODDR_A] = &aud_toddr_a.hw,
625 [AUD_CLKID_TODDR_B] = &aud_toddr_b.hw,
626 [AUD_CLKID_TODDR_C] = &aud_toddr_c.hw,
627 [AUD_CLKID_LOOPBACK] = &aud_loopback.hw,
628 [AUD_CLKID_SPDIFIN] = &aud_spdifin.hw,
629 [AUD_CLKID_SPDIFOUT] = &aud_spdifout.hw,
630 [AUD_CLKID_RESAMPLE] = &aud_resample.hw,
631 [AUD_CLKID_POWER_DETECT] = &aud_power_detect.hw,
632 [AUD_CLKID_SPDIFOUT_B] = &aud_spdifout_b.hw,
633 [AUD_CLKID_MST_A_MCLK_SEL] = &aud_mst_a_mclk_sel.hw,
634 [AUD_CLKID_MST_B_MCLK_SEL] = &aud_mst_b_mclk_sel.hw,
635 [AUD_CLKID_MST_C_MCLK_SEL] = &aud_mst_c_mclk_sel.hw,
636 [AUD_CLKID_MST_D_MCLK_SEL] = &aud_mst_d_mclk_sel.hw,
637 [AUD_CLKID_MST_E_MCLK_SEL] = &aud_mst_e_mclk_sel.hw,
638 [AUD_CLKID_MST_F_MCLK_SEL] = &aud_mst_f_mclk_sel.hw,
639 [AUD_CLKID_MST_A_MCLK_DIV] = &aud_mst_a_mclk_div.hw,
640 [AUD_CLKID_MST_B_MCLK_DIV] = &aud_mst_b_mclk_div.hw,
641 [AUD_CLKID_MST_C_MCLK_DIV] = &aud_mst_c_mclk_div.hw,
642 [AUD_CLKID_MST_D_MCLK_DIV] = &aud_mst_d_mclk_div.hw,
643 [AUD_CLKID_MST_E_MCLK_DIV] = &aud_mst_e_mclk_div.hw,
644 [AUD_CLKID_MST_F_MCLK_DIV] = &aud_mst_f_mclk_div.hw,
645 [AUD_CLKID_MST_A_MCLK] = &aud_mst_a_mclk.hw,
646 [AUD_CLKID_MST_B_MCLK] = &aud_mst_b_mclk.hw,
647 [AUD_CLKID_MST_C_MCLK] = &aud_mst_c_mclk.hw,
648 [AUD_CLKID_MST_D_MCLK] = &aud_mst_d_mclk.hw,
649 [AUD_CLKID_MST_E_MCLK] = &aud_mst_e_mclk.hw,
650 [AUD_CLKID_MST_F_MCLK] = &aud_mst_f_mclk.hw,
651 [AUD_CLKID_SPDIFOUT_CLK_SEL] = &aud_spdifout_clk_sel.hw,
652 [AUD_CLKID_SPDIFOUT_CLK_DIV] = &aud_spdifout_clk_div.hw,
653 [AUD_CLKID_SPDIFOUT_CLK] = &aud_spdifout_clk.hw,
654 [AUD_CLKID_SPDIFOUT_B_CLK_SEL] = &aud_spdifout_b_clk_sel.hw,
655 [AUD_CLKID_SPDIFOUT_B_CLK_DIV] = &aud_spdifout_b_clk_div.hw,
656 [AUD_CLKID_SPDIFOUT_B_CLK] = &aud_spdifout_b_clk.hw,
657 [AUD_CLKID_SPDIFIN_CLK_SEL] = &aud_spdifin_clk_sel.hw,
658 [AUD_CLKID_SPDIFIN_CLK_DIV] = &aud_spdifin_clk_div.hw,
659 [AUD_CLKID_SPDIFIN_CLK] = &aud_spdifin_clk.hw,
660 [AUD_CLKID_PDM_DCLK_SEL] = &aud_pdm_dclk_sel.hw,
661 [AUD_CLKID_PDM_DCLK_DIV] = &aud_pdm_dclk_div.hw,
662 [AUD_CLKID_PDM_DCLK] = &aud_pdm_dclk.hw,
663 [AUD_CLKID_PDM_SYSCLK_SEL] = &aud_pdm_sysclk_sel.hw,
664 [AUD_CLKID_PDM_SYSCLK_DIV] = &aud_pdm_sysclk_div.hw,
665 [AUD_CLKID_PDM_SYSCLK] = &aud_pdm_sysclk.hw,
666 [AUD_CLKID_MST_A_SCLK_PRE_EN] = &aud_mst_a_sclk_pre_en.hw,
667 [AUD_CLKID_MST_B_SCLK_PRE_EN] = &aud_mst_b_sclk_pre_en.hw,
668 [AUD_CLKID_MST_C_SCLK_PRE_EN] = &aud_mst_c_sclk_pre_en.hw,
669 [AUD_CLKID_MST_D_SCLK_PRE_EN] = &aud_mst_d_sclk_pre_en.hw,
670 [AUD_CLKID_MST_E_SCLK_PRE_EN] = &aud_mst_e_sclk_pre_en.hw,
671 [AUD_CLKID_MST_F_SCLK_PRE_EN] = &aud_mst_f_sclk_pre_en.hw,
672 [AUD_CLKID_MST_A_SCLK_DIV] = &aud_mst_a_sclk_div.hw,
673 [AUD_CLKID_MST_B_SCLK_DIV] = &aud_mst_b_sclk_div.hw,
674 [AUD_CLKID_MST_C_SCLK_DIV] = &aud_mst_c_sclk_div.hw,
675 [AUD_CLKID_MST_D_SCLK_DIV] = &aud_mst_d_sclk_div.hw,
676 [AUD_CLKID_MST_E_SCLK_DIV] = &aud_mst_e_sclk_div.hw,
677 [AUD_CLKID_MST_F_SCLK_DIV] = &aud_mst_f_sclk_div.hw,
678 [AUD_CLKID_MST_A_SCLK_POST_EN] = &aud_mst_a_sclk_post_en.hw,
679 [AUD_CLKID_MST_B_SCLK_POST_EN] = &aud_mst_b_sclk_post_en.hw,
680 [AUD_CLKID_MST_C_SCLK_POST_EN] = &aud_mst_c_sclk_post_en.hw,
681 [AUD_CLKID_MST_D_SCLK_POST_EN] = &aud_mst_d_sclk_post_en.hw,
682 [AUD_CLKID_MST_E_SCLK_POST_EN] = &aud_mst_e_sclk_post_en.hw,
683 [AUD_CLKID_MST_F_SCLK_POST_EN] = &aud_mst_f_sclk_post_en.hw,
684 [AUD_CLKID_MST_A_SCLK] = &aud_mst_a_sclk.hw,
685 [AUD_CLKID_MST_B_SCLK] = &aud_mst_b_sclk.hw,
686 [AUD_CLKID_MST_C_SCLK] = &aud_mst_c_sclk.hw,
687 [AUD_CLKID_MST_D_SCLK] = &aud_mst_d_sclk.hw,
688 [AUD_CLKID_MST_E_SCLK] = &aud_mst_e_sclk.hw,
689 [AUD_CLKID_MST_F_SCLK] = &aud_mst_f_sclk.hw,
690 [AUD_CLKID_MST_A_LRCLK_DIV] = &aud_mst_a_lrclk_div.hw,
691 [AUD_CLKID_MST_B_LRCLK_DIV] = &aud_mst_b_lrclk_div.hw,
692 [AUD_CLKID_MST_C_LRCLK_DIV] = &aud_mst_c_lrclk_div.hw,
693 [AUD_CLKID_MST_D_LRCLK_DIV] = &aud_mst_d_lrclk_div.hw,
694 [AUD_CLKID_MST_E_LRCLK_DIV] = &aud_mst_e_lrclk_div.hw,
695 [AUD_CLKID_MST_F_LRCLK_DIV] = &aud_mst_f_lrclk_div.hw,
696 [AUD_CLKID_MST_A_LRCLK] = &aud_mst_a_lrclk.hw,
697 [AUD_CLKID_MST_B_LRCLK] = &aud_mst_b_lrclk.hw,
698 [AUD_CLKID_MST_C_LRCLK] = &aud_mst_c_lrclk.hw,
699 [AUD_CLKID_MST_D_LRCLK] = &aud_mst_d_lrclk.hw,
700 [AUD_CLKID_MST_E_LRCLK] = &aud_mst_e_lrclk.hw,
701 [AUD_CLKID_MST_F_LRCLK] = &aud_mst_f_lrclk.hw,
702 [AUD_CLKID_TDMIN_A_SCLK_SEL] = &aud_tdmin_a_sclk_sel.hw,
703 [AUD_CLKID_TDMIN_B_SCLK_SEL] = &aud_tdmin_b_sclk_sel.hw,
704 [AUD_CLKID_TDMIN_C_SCLK_SEL] = &aud_tdmin_c_sclk_sel.hw,
705 [AUD_CLKID_TDMIN_LB_SCLK_SEL] = &aud_tdmin_lb_sclk_sel.hw,
706 [AUD_CLKID_TDMOUT_A_SCLK_SEL] = &aud_tdmout_a_sclk_sel.hw,
707 [AUD_CLKID_TDMOUT_B_SCLK_SEL] = &aud_tdmout_b_sclk_sel.hw,
708 [AUD_CLKID_TDMOUT_C_SCLK_SEL] = &aud_tdmout_c_sclk_sel.hw,
709 [AUD_CLKID_TDMIN_A_SCLK_PRE_EN] = &aud_tdmin_a_sclk_pre_en.hw,
710 [AUD_CLKID_TDMIN_B_SCLK_PRE_EN] = &aud_tdmin_b_sclk_pre_en.hw,
711 [AUD_CLKID_TDMIN_C_SCLK_PRE_EN] = &aud_tdmin_c_sclk_pre_en.hw,
712 [AUD_CLKID_TDMIN_LB_SCLK_PRE_EN] = &aud_tdmin_lb_sclk_pre_en.hw,
713 [AUD_CLKID_TDMOUT_A_SCLK_PRE_EN] = &aud_tdmout_a_sclk_pre_en.hw,
714 [AUD_CLKID_TDMOUT_B_SCLK_PRE_EN] = &aud_tdmout_b_sclk_pre_en.hw,
715 [AUD_CLKID_TDMOUT_C_SCLK_PRE_EN] = &aud_tdmout_c_sclk_pre_en.hw,
716 [AUD_CLKID_TDMIN_A_SCLK_POST_EN] = &aud_tdmin_a_sclk_post_en.hw,
717 [AUD_CLKID_TDMIN_B_SCLK_POST_EN] = &aud_tdmin_b_sclk_post_en.hw,
718 [AUD_CLKID_TDMIN_C_SCLK_POST_EN] = &aud_tdmin_c_sclk_post_en.hw,
719 [AUD_CLKID_TDMIN_LB_SCLK_POST_EN] = &aud_tdmin_lb_sclk_post_en.hw,
720 [AUD_CLKID_TDMOUT_A_SCLK_POST_EN] = &aud_tdmout_a_sclk_post_en.hw,
721 [AUD_CLKID_TDMOUT_B_SCLK_POST_EN] = &aud_tdmout_b_sclk_post_en.hw,
722 [AUD_CLKID_TDMOUT_C_SCLK_POST_EN] = &aud_tdmout_c_sclk_post_en.hw,
723 [AUD_CLKID_TDMIN_A_SCLK] = &aud_tdmin_a_sclk.hw,
724 [AUD_CLKID_TDMIN_B_SCLK] = &aud_tdmin_b_sclk.hw,
725 [AUD_CLKID_TDMIN_C_SCLK] = &aud_tdmin_c_sclk.hw,
726 [AUD_CLKID_TDMIN_LB_SCLK] = &aud_tdmin_lb_sclk.hw,
727 [AUD_CLKID_TDMOUT_A_SCLK] = &aud_tdmout_a_sclk.hw,
728 [AUD_CLKID_TDMOUT_B_SCLK] = &aud_tdmout_b_sclk.hw,
729 [AUD_CLKID_TDMOUT_C_SCLK] = &aud_tdmout_c_sclk.hw,
730 [AUD_CLKID_TDMIN_A_LRCLK] = &aud_tdmin_a_lrclk.hw,
731 [AUD_CLKID_TDMIN_B_LRCLK] = &aud_tdmin_b_lrclk.hw,
732 [AUD_CLKID_TDMIN_C_LRCLK] = &aud_tdmin_c_lrclk.hw,
733 [AUD_CLKID_TDMIN_LB_LRCLK] = &aud_tdmin_lb_lrclk.hw,
734 [AUD_CLKID_TDMOUT_A_LRCLK] = &aud_tdmout_a_lrclk.hw,
735 [AUD_CLKID_TDMOUT_B_LRCLK] = &aud_tdmout_b_lrclk.hw,
736 [AUD_CLKID_TDMOUT_C_LRCLK] = &aud_tdmout_c_lrclk.hw,
737 [AUD_CLKID_TDM_MCLK_PAD0] = &aud_tdm_mclk_pad_0.hw,
738 [AUD_CLKID_TDM_MCLK_PAD1] = &aud_tdm_mclk_pad_1.hw,
739 [AUD_CLKID_TDM_LRCLK_PAD0] = &aud_tdm_lrclk_pad_0.hw,
740 [AUD_CLKID_TDM_LRCLK_PAD1] = &aud_tdm_lrclk_pad_1.hw,
741 [AUD_CLKID_TDM_LRCLK_PAD2] = &aud_tdm_lrclk_pad_2.hw,
742 [AUD_CLKID_TDM_SCLK_PAD0] = &aud_tdm_sclk_pad_0.hw,
743 [AUD_CLKID_TDM_SCLK_PAD1] = &aud_tdm_sclk_pad_1.hw,
744 [AUD_CLKID_TDM_SCLK_PAD2] = &aud_tdm_sclk_pad_2.hw,
1021 struct clk_hw *hw; in axg_audio_clkc_probe() local
1058 hw = data->hw_onecell_data->hws[i]; in axg_audio_clkc_probe()
1060 if (!hw) in axg_audio_clkc_probe()
1063 name = hw->init->name; in axg_audio_clkc_probe()
1065 ret = devm_clk_hw_register(dev, hw); in axg_audio_clkc_probe()