Lines Matching refs:clk_init
599 struct clk_init_data clk_init; in ingenic_register_clock() local
637 ingenic_clk->hw.init = &clk_init; in ingenic_register_clock()
641 clk_init.name = clk_info->name; in ingenic_register_clock()
642 clk_init.flags = 0; in ingenic_register_clock()
643 clk_init.parent_names = parent_names; in ingenic_register_clock()
648 clk_init.num_parents = 0; in ingenic_register_clock()
660 parent_names[clk_init.num_parents] = in ingenic_register_clock()
662 clk_init.num_parents++; in ingenic_register_clock()
665 BUG_ON(!clk_init.num_parents); in ingenic_register_clock()
666 BUG_ON(clk_init.num_parents > ARRAY_SIZE(parent_names)); in ingenic_register_clock()
669 clk_init.num_parents = 1; in ingenic_register_clock()
675 clk_init.ops = clk_info->custom.clk_ops; in ingenic_register_clock()
685 clk_init.ops = &ingenic_pll_ops; in ingenic_register_clock()
686 clk_init.flags |= CLK_SET_RATE_GATE; in ingenic_register_clock()
696 clk_init.ops = &ingenic_clk_ops; in ingenic_register_clock()
704 clk_init.flags |= CLK_SET_PARENT_GATE; in ingenic_register_clock()
713 clk_init.flags |= CLK_SET_RATE_PARENT; in ingenic_register_clock()