Lines Matching refs:clk_set_parent
235 clk_set_parent(clk[VF610_PLL1_BYPASS], clk[VF610_CLK_PLL1]); in vf610_clocks_init()
236 clk_set_parent(clk[VF610_PLL2_BYPASS], clk[VF610_CLK_PLL2]); in vf610_clocks_init()
237 clk_set_parent(clk[VF610_PLL3_BYPASS], clk[VF610_CLK_PLL3]); in vf610_clocks_init()
238 clk_set_parent(clk[VF610_PLL4_BYPASS], clk[VF610_CLK_PLL4]); in vf610_clocks_init()
239 clk_set_parent(clk[VF610_PLL5_BYPASS], clk[VF610_CLK_PLL5]); in vf610_clocks_init()
240 clk_set_parent(clk[VF610_PLL6_BYPASS], clk[VF610_CLK_PLL6]); in vf610_clocks_init()
241 clk_set_parent(clk[VF610_PLL7_BYPASS], clk[VF610_CLK_PLL7]); in vf610_clocks_init()
444 clk_set_parent(clk[VF610_CLK_QSPI0_SEL], clk[VF610_CLK_PLL1_PFD4]); in vf610_clocks_init()
449 clk_set_parent(clk[VF610_CLK_QSPI1_SEL], clk[VF610_CLK_PLL1_PFD4]); in vf610_clocks_init()
454 clk_set_parent(clk[VF610_CLK_SAI0_SEL], clk[VF610_CLK_AUDIO_EXT]); in vf610_clocks_init()
455 clk_set_parent(clk[VF610_CLK_SAI1_SEL], clk[VF610_CLK_AUDIO_EXT]); in vf610_clocks_init()
456 clk_set_parent(clk[VF610_CLK_SAI2_SEL], clk[VF610_CLK_AUDIO_EXT]); in vf610_clocks_init()
457 clk_set_parent(clk[VF610_CLK_SAI3_SEL], clk[VF610_CLK_AUDIO_EXT]); in vf610_clocks_init()