57 	u32 val = readl_relaxed(pll->base) & pll->power_bit;  in clk_pllv3_wait_lock()
65 		if (readl_relaxed(pll->base) & BM_PLL_LOCK)  in clk_pllv3_wait_lock()
72 	return readl_relaxed(pll->base) & BM_PLL_LOCK ? 0 : -ETIMEDOUT;  in clk_pllv3_wait_lock()
80 	val = readl_relaxed(pll->base);  in clk_pllv3_prepare()
95 	val = readl_relaxed(pll->base);  in clk_pllv3_unprepare()
107 	if (readl_relaxed(pll->base) & BM_PLL_LOCK)  in clk_pllv3_is_prepared()
117 	u32 div = (readl_relaxed(pll->base) >> pll->div_shift)  & pll->div_mask;  in clk_pllv3_recalc_rate()
144 	val = readl_relaxed(pll->base);  in clk_pllv3_set_rate()
165 	u32 div = readl_relaxed(pll->base) & pll->div_mask;  in clk_pllv3_sys_recalc_rate()
199 	val = readl_relaxed(pll->base);  in clk_pllv3_sys_set_rate()
220 	u32 mfn = readl_relaxed(pll->base + pll->num_offset);  in clk_pllv3_av_recalc_rate()
221 	u32 mfd = readl_relaxed(pll->base + pll->denom_offset);  in clk_pllv3_av_recalc_rate()
222 	u32 div = readl_relaxed(pll->base) & pll->div_mask;  in clk_pllv3_av_recalc_rate()
286 	val = readl_relaxed(pll->base);  in clk_pllv3_av_set_rate()
353 	mf.mfn = readl_relaxed(pll->base + pll->num_offset);  in clk_pllv3_vf610_recalc_rate()
354 	mf.mfd = readl_relaxed(pll->base + pll->denom_offset);  in clk_pllv3_vf610_recalc_rate()
355 	mf.mfi = (readl_relaxed(pll->base) & pll->div_mask) ? 22 : 20;  in clk_pllv3_vf610_recalc_rate()
376 	val = readl_relaxed(pll->base);  in clk_pllv3_vf610_set_rate()