307 	void __iomem *pll_base;  in mx50_clocks_init()  local
310 	pll_base = ioremap(MX53_DPLL1_BASE, SZ_16K);  in mx50_clocks_init()
311 	WARN_ON(!pll_base);  in mx50_clocks_init()
312 	clk[IMX5_CLK_PLL1_SW]		= imx_clk_pllv2("pll1_sw", "osc", pll_base);  in mx50_clocks_init()
314 	pll_base = ioremap(MX53_DPLL2_BASE, SZ_16K);  in mx50_clocks_init()
315 	WARN_ON(!pll_base);  in mx50_clocks_init()
316 	clk[IMX5_CLK_PLL2_SW]		= imx_clk_pllv2("pll2_sw", "osc", pll_base);  in mx50_clocks_init()
318 	pll_base = ioremap(MX53_DPLL3_BASE, SZ_16K);  in mx50_clocks_init()
319 	WARN_ON(!pll_base);  in mx50_clocks_init()
320 	clk[IMX5_CLK_PLL3_SW]		= imx_clk_pllv2("pll3_sw", "osc", pll_base);  in mx50_clocks_init()
392 	void __iomem *pll_base;  in mx51_clocks_init()  local
395 	pll_base = ioremap(MX51_DPLL1_BASE, SZ_16K);  in mx51_clocks_init()
396 	WARN_ON(!pll_base);  in mx51_clocks_init()
397 	clk[IMX5_CLK_PLL1_SW]		= imx_clk_pllv2("pll1_sw", "osc", pll_base);  in mx51_clocks_init()
399 	pll_base = ioremap(MX51_DPLL2_BASE, SZ_16K);  in mx51_clocks_init()
400 	WARN_ON(!pll_base);  in mx51_clocks_init()
401 	clk[IMX5_CLK_PLL2_SW]		= imx_clk_pllv2("pll2_sw", "osc", pll_base);  in mx51_clocks_init()
403 	pll_base = ioremap(MX51_DPLL3_BASE, SZ_16K);  in mx51_clocks_init()
404 	WARN_ON(!pll_base);  in mx51_clocks_init()
405 	clk[IMX5_CLK_PLL3_SW]		= imx_clk_pllv2("pll3_sw", "osc", pll_base);  in mx51_clocks_init()
498 	void __iomem *pll_base;  in mx53_clocks_init()  local
501 	pll_base = ioremap(MX53_DPLL1_BASE, SZ_16K);  in mx53_clocks_init()
502 	WARN_ON(!pll_base);  in mx53_clocks_init()
503 	clk[IMX5_CLK_PLL1_SW]		= imx_clk_pllv2("pll1_sw", "osc", pll_base);  in mx53_clocks_init()
505 	pll_base = ioremap(MX53_DPLL2_BASE, SZ_16K);  in mx53_clocks_init()
506 	WARN_ON(!pll_base);  in mx53_clocks_init()
507 	clk[IMX5_CLK_PLL2_SW]		= imx_clk_pllv2("pll2_sw", "osc", pll_base);  in mx53_clocks_init()
509 	pll_base = ioremap(MX53_DPLL3_BASE, SZ_16K);  in mx53_clocks_init()
510 	WARN_ON(!pll_base);  in mx53_clocks_init()
511 	clk[IMX5_CLK_PLL3_SW]		= imx_clk_pllv2("pll3_sw", "osc", pll_base);  in mx53_clocks_init()
513 	pll_base = ioremap(MX53_DPLL4_BASE, SZ_16K);  in mx53_clocks_init()
514 	WARN_ON(!pll_base);  in mx53_clocks_init()
515 	clk[IMX5_CLK_PLL4_SW]		= imx_clk_pllv2("pll4_sw", "osc", pll_base);  in mx53_clocks_init()