39 	const struct clk_pcr_layout *layout;  member
166 	regmap_write(periph->regmap, periph->layout->offset,  in clk_sam9x5_peripheral_enable()
167 		     (periph->id & periph->layout->pid_mask));  in clk_sam9x5_peripheral_enable()
168 	regmap_update_bits(periph->regmap, periph->layout->offset,  in clk_sam9x5_peripheral_enable()
169 			   periph->layout->div_mask | periph->layout->cmd |  in clk_sam9x5_peripheral_enable()
171 			   field_prep(periph->layout->div_mask, periph->div) |  in clk_sam9x5_peripheral_enable()
172 			   periph->layout->cmd |  in clk_sam9x5_peripheral_enable()
188 	regmap_write(periph->regmap, periph->layout->offset,  in clk_sam9x5_peripheral_disable()
189 		     (periph->id & periph->layout->pid_mask));  in clk_sam9x5_peripheral_disable()
190 	regmap_update_bits(periph->regmap, periph->layout->offset,  in clk_sam9x5_peripheral_disable()
191 			   AT91_PMC_PCR_EN | periph->layout->cmd,  in clk_sam9x5_peripheral_disable()
192 			   periph->layout->cmd);  in clk_sam9x5_peripheral_disable()
206 	regmap_write(periph->regmap, periph->layout->offset,  in clk_sam9x5_peripheral_is_enabled()
207 		     (periph->id & periph->layout->pid_mask));  in clk_sam9x5_peripheral_is_enabled()
208 	regmap_read(periph->regmap, periph->layout->offset, &status);  in clk_sam9x5_peripheral_is_enabled()
226 	regmap_write(periph->regmap, periph->layout->offset,  in clk_sam9x5_peripheral_recalc_rate()
227 		     (periph->id & periph->layout->pid_mask));  in clk_sam9x5_peripheral_recalc_rate()
228 	regmap_read(periph->regmap, periph->layout->offset, &status);  in clk_sam9x5_peripheral_recalc_rate()
232 		periph->div = field_get(periph->layout->div_mask, status);  in clk_sam9x5_peripheral_recalc_rate()
325 				    const struct clk_pcr_layout *layout,  in at91_clk_register_sam9x5_peripheral()  argument
352 	if (layout->div_mask)  in at91_clk_register_sam9x5_peripheral()
354 	periph->layout = layout;  in at91_clk_register_sam9x5_peripheral()