Lines Matching refs:CMU_DEVCLKEN1
66 #define CMU_DEVCLKEN1 (0x00A4) macro
178 static OWL_GATE(spi0_clk, "spi0_clk", "ahb_clk", CMU_DEVCLKEN1, 10, 0, CLK_IGNORE_UNUSED);
179 static OWL_GATE(spi1_clk, "spi1_clk", "ahb_clk", CMU_DEVCLKEN1, 11, 0, CLK_IGNORE_UNUSED);
180 static OWL_GATE(spi2_clk, "spi2_clk", "ahb_clk", CMU_DEVCLKEN1, 12, 0, CLK_IGNORE_UNUSED);
181 static OWL_GATE(spi3_clk, "spi3_clk", "ahb_clk", CMU_DEVCLKEN1, 13, 0, CLK_IGNORE_UNUSED);
182 static OWL_GATE(timer_clk, "timer_clk", "hosc", CMU_DEVCLKEN1, 27, 0, 0);
183 static OWL_GATE(hdmi_clk, "hdmi_clk", "hosc", CMU_DEVCLKEN1, 3, 0, 0);
245 OWL_GATE_HW(CMU_DEVCLKEN1, 23, 0),
251 OWL_GATE_HW(CMU_DEVCLKEN1, 24, 0),
257 OWL_GATE_HW(CMU_DEVCLKEN1, 25, 0),
263 OWL_GATE_HW(CMU_DEVCLKEN1, 26, 0),
285 OWL_GATE_HW(CMU_DEVCLKEN1, 14, 0),
289 OWL_GATE_HW(CMU_DEVCLKEN1, 15, 0),
293 OWL_GATE_HW(CMU_DEVCLKEN1, 30, 0),
297 OWL_GATE_HW(CMU_DEVCLKEN1, 31, 0),
302 OWL_GATE_HW(CMU_DEVCLKEN1, 6, 0),
308 OWL_GATE_HW(CMU_DEVCLKEN1, 7, 0),
314 OWL_GATE_HW(CMU_DEVCLKEN1, 8, 0),
320 OWL_GATE_HW(CMU_DEVCLKEN1, 19, 0),
326 OWL_GATE_HW(CMU_DEVCLKEN1, 20, 0),
332 OWL_GATE_HW(CMU_DEVCLKEN1, 21, 0),
338 OWL_GATE_HW(CMU_DEVCLKEN1, 18, 0),