Lines Matching refs:MODE
253 #define MODE 0x22 macro
2926 write_reg(info, CHB + MODE, val); in enable_auxclk()
3011 val = read_reg(info, CHA + MODE) | BIT0; in loopback_enable()
3012 write_reg(info, CHA + MODE, val); in loopback_enable()
3069 write_reg(info, CHA + MODE, val); in hdlc_mode()
3262 clear_reg_bits(info, CHA + MODE, BIT3); in rx_stop()
3279 set_reg_bits(info, CHA + MODE, BIT3); in rx_start()
3341 write_reg(info, CHA + MODE, 0); in reset_device()
3342 write_reg(info, CHB + MODE, 0); in reset_device()
3415 write_reg(info, CHA + MODE, val); in async_mode()
3539 set_reg_bits(info, CHA + MODE, BIT3); in async_mode()
3594 val = read_reg(info, CHA + MODE); in set_signals()
3606 write_reg(info, CHA + MODE, val); in set_signals()