Lines Matching refs:rd_regl
360 static inline u32 rd_regl (const hrz_dev * dev, unsigned char reg) { in rd_regl() function
392 return rd_regl (dev, MEMORY_PORT_OFF); in rd_mem()
402 return rd_regl (dev, MEMORY_PORT_OFF); in rd_framer()
467 PRINTD (DBG_REGS, "CONTROL 0: %#x", rd_regl (dev, CONTROL_0_REG)); in dump_regs()
471 PRINTD (DBG_REGS, "IRQ ENBLE: %#x", rd_regl (dev, INT_ENABLE_REG_OFF)); in dump_regs()
472 PRINTD (DBG_REGS, "IRQ SORCE: %#x", rd_regl (dev, INT_SOURCE_REG_OFF)); in dump_regs()
932 while (rd_regl (dev, MASTER_RX_COUNT_REG_OFF)) { in rx_schedule()
1098 while (rd_regl (dev, MASTER_TX_COUNT_REG_OFF)) { in tx_schedule()
1358 while ((int_source = rd_regl (dev, INT_SOURCE_REG_OFF) in interrupt_handler()
1721 u32 control_0_reg = rd_regl (dev, CONTROL_0_REG); in hrz_reset()
1728 control_0_reg = rd_regl (dev, CONTROL_0_REG); in hrz_reset()
1756 u32 ctrl = rd_regl (dev, CONTROL_0_REG); in read_bia()
1798 if (rd_regl (dev, CONTROL_0_REG) & SEEPROM_DO) in read_bia()
1825 ctrl = rd_regl (dev, CONTROL_0_REG); in hrz_init()