Lines Matching refs:hwc
137 struct hw_perf_event *hwc, int idx) in xtensa_perf_event_update() argument
143 prev_raw_count = local64_read(&hwc->prev_count); in xtensa_perf_event_update()
145 } while (local64_cmpxchg(&hwc->prev_count, prev_raw_count, in xtensa_perf_event_update()
151 local64_sub(delta, &hwc->period_left); in xtensa_perf_event_update()
155 struct hw_perf_event *hwc, int idx) in xtensa_perf_event_set_period() argument
163 s64 period = hwc->sample_period; in xtensa_perf_event_set_period()
165 left = local64_read(&hwc->period_left); in xtensa_perf_event_set_period()
168 local64_set(&hwc->period_left, left); in xtensa_perf_event_set_period()
169 hwc->last_period = period; in xtensa_perf_event_set_period()
173 local64_set(&hwc->period_left, left); in xtensa_perf_event_set_period()
174 hwc->last_period = period; in xtensa_perf_event_set_period()
181 local64_set(&hwc->prev_count, -left); in xtensa_perf_event_set_period()
242 struct hw_perf_event *hwc = &event->hw; in xtensa_pmu_start() local
243 int idx = hwc->idx; in xtensa_pmu_start()
250 xtensa_perf_event_set_period(event, hwc, idx); in xtensa_pmu_start()
253 hwc->state = 0; in xtensa_pmu_start()
255 set_er(hwc->config, XTENSA_PMU_PMCTRL(idx)); in xtensa_pmu_start()
260 struct hw_perf_event *hwc = &event->hw; in xtensa_pmu_stop() local
261 int idx = hwc->idx; in xtensa_pmu_stop()
263 if (!(hwc->state & PERF_HES_STOPPED)) { in xtensa_pmu_stop()
267 hwc->state |= PERF_HES_STOPPED; in xtensa_pmu_stop()
284 struct hw_perf_event *hwc = &event->hw; in xtensa_pmu_add() local
285 int idx = hwc->idx; in xtensa_pmu_add()
294 hwc->idx = idx; in xtensa_pmu_add()
298 hwc->state = PERF_HES_UPTODATE | PERF_HES_STOPPED; in xtensa_pmu_add()
370 struct hw_perf_event *hwc = &event->hw; in xtensa_pmu_irq_handler() local
377 xtensa_perf_event_update(event, hwc, i); in xtensa_pmu_irq_handler()
378 last_period = hwc->last_period; in xtensa_pmu_irq_handler()
379 if (xtensa_perf_event_set_period(event, hwc, i)) { in xtensa_pmu_irq_handler()