Lines Matching refs:a5
166 s32i a5, a2, PT_AREG5
206 l32i a5, a3, 4
209 __src_b a4, a4, a5 # a4 has the instruction
213 extui a5, a4, INSN_OP0, 4 # get insn.op0 nibble
216 _beqi a5, OP0_L32I_N, .Lload # L32I.N, jump
217 addi a6, a5, -OP0_S32I_N
225 .Lstore:movi a5, .Lstore_table # table
227 addx8 a5, a6, a5
228 jx a5 # jump into table
238 l32e a5, a3, -8
241 l32i a5, a3, 0
244 __src_b a3, a5, a6 # a3 has the data word
249 extui a5, a4, INSN_OP0, 4
250 _beqi a5, OP0_L32I_N, 1f # l32i.n: jump
257 extui a5, a4, INSN_OP1, 4
258 _beqi a5, OP1_L32I, 1f # l32i: jump
261 _beqi a5, OP1_L16UI, 1f
262 addi a5, a5, -OP1_L16SI
263 _bnez a5, .Linvalid_instruction_load
274 movi a5, .Lload_table
275 addx8 a4, a4, a5
330 l32i a5, a2, PT_AREG5
351 extui a5, a4, INSN_OP0, 4 # extract OP0
352 addi a5, a5, -OP0_S32I_N
353 _beqz a5, 1f # s32i.n: jump
360 extui a5, a4, INSN_OP1, 4 # extract OP1
361 _beqi a5, OP1_S32I, 1f # jump if 32 bit store
362 _bnei a5, OP1_S16I, .Linvalid_instruction_store
364 movi a5, -1
366 __exth a6, a5 # get 16-bit mask ffffffff:ffff0000
376 movi a5, -1 # mask: ffffffff:XXXX0000
382 __src_b a8, a5, a6 # lo-mask F..F0..0 (BE) 0..0F..F (LE)
383 __src_b a6, a6, a5 # hi-mask 0..0F..F (BE) F..F0..0 (LE)
385 l32e a5, a4, -8
387 l32i a5, a4, 0 # load lower address word
389 and a5, a5, a8 # mask
391 or a5, a5, a8 # or with original value
393 s32e a5, a4, -8
396 s32i a5, a4, 0 # store
399 __sl a5, a3
401 or a6, a6, a5
438 l32i a5, a2, PT_AREG5
459 l32i a5, a2, PT_AREG5