Lines Matching refs:add_2reg
194 static u8 add_2reg(u8 byte, u32 dst_reg, u32 src_reg) in add_2reg() function
214 EMIT2(0x33, add_2reg(0xC0, IA32_EAX, IA32_EAX)); in emit_ia32_mov_i()
216 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EAX), in emit_ia32_mov_i()
224 EMIT2(0x33, add_2reg(0xC0, dst, dst)); in emit_ia32_mov_i()
242 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(src)); in emit_ia32_mov_r()
245 EMIT3(0x89, add_2reg(0x40, IA32_EBP, sreg), STACK_VAR(dst)); in emit_ia32_mov_r()
248 EMIT2(0x89, add_2reg(0xC0, dst, sreg)); in emit_ia32_mov_r()
293 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX), STACK_VAR(src)); in emit_ia32_mul_r()
297 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(dst)); in emit_ia32_mul_r()
300 EMIT2(0x8B, add_2reg(0xC0, dst, IA32_EAX)); in emit_ia32_mul_r()
307 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EAX), in emit_ia32_mul_r()
311 EMIT2(0x89, add_2reg(0xC0, dst, IA32_EAX)); in emit_ia32_mul_r()
326 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in emit_ia32_to_le_r64()
328 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX), in emit_ia32_to_le_r64()
338 EMIT1(add_2reg(0xC0, dreg_lo, dreg_lo)); in emit_ia32_to_le_r64()
341 EMIT2(0x33, add_2reg(0xC0, dreg_hi, dreg_hi)); in emit_ia32_to_le_r64()
346 EMIT2(0x33, add_2reg(0xC0, dreg_hi, dreg_hi)); in emit_ia32_to_le_r64()
355 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_lo), in emit_ia32_to_le_r64()
358 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_hi), in emit_ia32_to_le_r64()
374 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in emit_ia32_to_be_r64()
376 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX), in emit_ia32_to_be_r64()
386 EMIT1(add_2reg(0xC0, dreg_lo, dreg_lo)); in emit_ia32_to_be_r64()
390 EMIT2(0x33, add_2reg(0xC0, dreg_hi, dreg_hi)); in emit_ia32_to_be_r64()
399 EMIT2(0x33, add_2reg(0xC0, dreg_hi, dreg_hi)); in emit_ia32_to_be_r64()
411 EMIT2(0x89, add_2reg(0xC0, IA32_ECX, dreg_hi)); in emit_ia32_to_be_r64()
413 EMIT2(0x89, add_2reg(0xC0, dreg_hi, dreg_lo)); in emit_ia32_to_be_r64()
415 EMIT2(0x89, add_2reg(0xC0, dreg_lo, IA32_ECX)); in emit_ia32_to_be_r64()
421 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_lo), in emit_ia32_to_be_r64()
424 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_hi), in emit_ia32_to_be_r64()
442 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX), in emit_ia32_div_mod_r()
446 EMIT2(0x8B, add_2reg(0xC0, src, IA32_ECX)); in emit_ia32_div_mod_r()
450 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in emit_ia32_div_mod_r()
454 EMIT2(0x8B, add_2reg(0xC0, dst, IA32_EAX)); in emit_ia32_div_mod_r()
457 EMIT2(0x31, add_2reg(0xC0, IA32_EDX, IA32_EDX)); in emit_ia32_div_mod_r()
463 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EDX), in emit_ia32_div_mod_r()
466 EMIT2(0x89, add_2reg(0xC0, dst, IA32_EDX)); in emit_ia32_div_mod_r()
469 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EAX), in emit_ia32_div_mod_r()
472 EMIT2(0x89, add_2reg(0xC0, dst, IA32_EAX)); in emit_ia32_div_mod_r()
491 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(dst)); in emit_ia32_shift_r()
495 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX), STACK_VAR(src)); in emit_ia32_shift_r()
498 EMIT2(0x8B, add_2reg(0xC0, src, IA32_ECX)); in emit_ia32_shift_r()
514 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg), STACK_VAR(dst)); in emit_ia32_shift_r()
533 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(src)); in emit_ia32_alu_r()
537 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX), STACK_VAR(dst)); in emit_ia32_alu_r()
543 EMIT2(0x11, add_2reg(0xC0, dreg, sreg)); in emit_ia32_alu_r()
545 EMIT2(0x01, add_2reg(0xC0, dreg, sreg)); in emit_ia32_alu_r()
550 EMIT2(0x19, add_2reg(0xC0, dreg, sreg)); in emit_ia32_alu_r()
552 EMIT2(0x29, add_2reg(0xC0, dreg, sreg)); in emit_ia32_alu_r()
556 EMIT2(0x09, add_2reg(0xC0, dreg, sreg)); in emit_ia32_alu_r()
560 EMIT2(0x21, add_2reg(0xC0, dreg, sreg)); in emit_ia32_alu_r()
564 EMIT2(0x31, add_2reg(0xC0, dreg, sreg)); in emit_ia32_alu_r()
570 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg), in emit_ia32_alu_r()
607 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(dst)); in emit_ia32_alu_i()
620 EMIT2(0x11, add_2reg(0xC0, dreg, sreg)); in emit_ia32_alu_i()
625 EMIT2(0x01, add_2reg(0xC0, dreg, sreg)); in emit_ia32_alu_i()
634 EMIT2(0x19, add_2reg(0xC0, dreg, sreg)); in emit_ia32_alu_i()
639 EMIT2(0x29, add_2reg(0xC0, dreg, sreg)); in emit_ia32_alu_i()
647 EMIT2(0x09, add_2reg(0xC0, dreg, sreg)); in emit_ia32_alu_i()
654 EMIT2(0x21, add_2reg(0xC0, dreg, sreg)); in emit_ia32_alu_i()
661 EMIT2(0x31, add_2reg(0xC0, dreg, sreg)); in emit_ia32_alu_i()
670 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg), in emit_ia32_alu_i()
705 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in emit_ia32_neg64()
707 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX), in emit_ia32_neg64()
720 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_lo), in emit_ia32_neg64()
723 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_hi), in emit_ia32_neg64()
739 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in emit_ia32_lsh_r64()
741 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX), in emit_ia32_lsh_r64()
747 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX), in emit_ia32_lsh_r64()
751 EMIT2(0x8B, add_2reg(0xC0, src_lo, IA32_ECX)); in emit_ia32_lsh_r64()
754 EMIT3(0x0F, 0xA5, add_2reg(0xC0, dreg_hi, dreg_lo)); in emit_ia32_lsh_r64()
766 EMIT2(0x89, add_2reg(0xC0, dreg_hi, dreg_lo)); in emit_ia32_lsh_r64()
768 EMIT2(0x33, add_2reg(0xC0, dreg_lo, dreg_lo)); in emit_ia32_lsh_r64()
772 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_lo), in emit_ia32_lsh_r64()
775 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_hi), in emit_ia32_lsh_r64()
792 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in emit_ia32_arsh_r64()
794 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX), in emit_ia32_arsh_r64()
800 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX), in emit_ia32_arsh_r64()
804 EMIT2(0x8B, add_2reg(0xC0, src_lo, IA32_ECX)); in emit_ia32_arsh_r64()
807 EMIT3(0x0F, 0xAD, add_2reg(0xC0, dreg_lo, dreg_hi)); in emit_ia32_arsh_r64()
819 EMIT2(0x89, add_2reg(0xC0, dreg_lo, dreg_hi)); in emit_ia32_arsh_r64()
825 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_lo), in emit_ia32_arsh_r64()
828 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_hi), in emit_ia32_arsh_r64()
845 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in emit_ia32_rsh_r64()
847 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX), in emit_ia32_rsh_r64()
853 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX), in emit_ia32_rsh_r64()
857 EMIT2(0x8B, add_2reg(0xC0, src_lo, IA32_ECX)); in emit_ia32_rsh_r64()
860 EMIT3(0x0F, 0xAD, add_2reg(0xC0, dreg_lo, dreg_hi)); in emit_ia32_rsh_r64()
872 EMIT2(0x89, add_2reg(0xC0, dreg_lo, dreg_hi)); in emit_ia32_rsh_r64()
874 EMIT2(0x33, add_2reg(0xC0, dreg_hi, dreg_hi)); in emit_ia32_rsh_r64()
878 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_lo), in emit_ia32_rsh_r64()
881 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_hi), in emit_ia32_rsh_r64()
898 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in emit_ia32_lsh_i64()
900 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX), in emit_ia32_lsh_i64()
906 EMIT4(0x0F, 0xA4, add_2reg(0xC0, dreg_hi, dreg_lo), val); in emit_ia32_lsh_i64()
915 EMIT2(0x89, add_2reg(0xC0, dreg_hi, dreg_lo)); in emit_ia32_lsh_i64()
917 EMIT2(0x33, add_2reg(0xC0, dreg_lo, dreg_lo)); in emit_ia32_lsh_i64()
920 EMIT2(0x33, add_2reg(0xC0, dreg_lo, dreg_lo)); in emit_ia32_lsh_i64()
922 EMIT2(0x33, add_2reg(0xC0, dreg_hi, dreg_hi)); in emit_ia32_lsh_i64()
927 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_lo), in emit_ia32_lsh_i64()
930 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_hi), in emit_ia32_lsh_i64()
946 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in emit_ia32_rsh_i64()
948 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX), in emit_ia32_rsh_i64()
955 EMIT4(0x0F, 0xAC, add_2reg(0xC0, dreg_lo, dreg_hi), val); in emit_ia32_rsh_i64()
964 EMIT2(0x89, add_2reg(0xC0, dreg_lo, dreg_hi)); in emit_ia32_rsh_i64()
966 EMIT2(0x33, add_2reg(0xC0, dreg_hi, dreg_hi)); in emit_ia32_rsh_i64()
969 EMIT2(0x33, add_2reg(0xC0, dreg_lo, dreg_lo)); in emit_ia32_rsh_i64()
971 EMIT2(0x33, add_2reg(0xC0, dreg_hi, dreg_hi)); in emit_ia32_rsh_i64()
976 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_lo), in emit_ia32_rsh_i64()
979 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_hi), in emit_ia32_rsh_i64()
995 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in emit_ia32_arsh_i64()
997 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX), in emit_ia32_arsh_i64()
1003 EMIT4(0x0F, 0xAC, add_2reg(0xC0, dreg_lo, dreg_hi), val); in emit_ia32_arsh_i64()
1012 EMIT2(0x89, add_2reg(0xC0, dreg_lo, dreg_hi)); in emit_ia32_arsh_i64()
1020 EMIT2(0x89, add_2reg(0xC0, dreg_lo, dreg_hi)); in emit_ia32_arsh_i64()
1025 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_lo), in emit_ia32_arsh_i64()
1028 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_hi), in emit_ia32_arsh_i64()
1042 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in emit_ia32_mul_r64()
1046 EMIT2(0x8B, add_2reg(0xC0, dst_hi, IA32_EAX)); in emit_ia32_mul_r64()
1056 EMIT2(0x89, add_2reg(0xC0, IA32_ECX, IA32_EAX)); in emit_ia32_mul_r64()
1060 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in emit_ia32_mul_r64()
1064 EMIT2(0x8B, add_2reg(0xC0, dst_lo, IA32_EAX)); in emit_ia32_mul_r64()
1074 EMIT2(0x01, add_2reg(0xC0, IA32_ECX, IA32_EAX)); in emit_ia32_mul_r64()
1078 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in emit_ia32_mul_r64()
1082 EMIT2(0x8B, add_2reg(0xC0, dst_lo, IA32_EAX)); in emit_ia32_mul_r64()
1092 EMIT2(0x01, add_2reg(0xC0, IA32_ECX, IA32_EDX)); in emit_ia32_mul_r64()
1096 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EAX), in emit_ia32_mul_r64()
1099 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_ECX), in emit_ia32_mul_r64()
1103 EMIT2(0x89, add_2reg(0xC0, dst_lo, IA32_EAX)); in emit_ia32_mul_r64()
1105 EMIT2(0x89, add_2reg(0xC0, dst_hi, IA32_ECX)); in emit_ia32_mul_r64()
1129 EMIT2(0x89, add_2reg(0xC0, IA32_ECX, IA32_EAX)); in emit_ia32_mul_i64()
1140 EMIT2(0x01, add_2reg(0xC0, IA32_ECX, IA32_EAX)); in emit_ia32_mul_i64()
1152 EMIT2(0x01, add_2reg(0xC0, IA32_ECX, IA32_EDX)); in emit_ia32_mul_i64()
1156 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EAX), in emit_ia32_mul_i64()
1159 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_ECX), in emit_ia32_mul_i64()
1163 EMIT2(0x89, add_2reg(0xC0, dst_lo, IA32_EAX)); in emit_ia32_mul_i64()
1165 EMIT2(0x89, add_2reg(0xC0, dst_hi, IA32_ECX)); in emit_ia32_mul_i64()
1224 EMIT2(0x31, add_2reg(0xC0, IA32_EBX, IA32_EBX)); in emit_prologue()
1227 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EBP), STACK_VAR(fplo)); in emit_prologue()
1228 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EBX), STACK_VAR(fphi)); in emit_prologue()
1232 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(r1[0])); in emit_prologue()
1233 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EBX), STACK_VAR(r1[1])); in emit_prologue()
1236 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EBX), STACK_VAR(tcc[0])); in emit_prologue()
1237 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EBX), STACK_VAR(tcc[1])); in emit_prologue()
1251 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(r0[0])); in emit_epilogue()
1253 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX), STACK_VAR(r0[1])); in emit_epilogue()
1259 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EBX), -12); in emit_epilogue()
1261 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ESI), -8); in emit_epilogue()
1263 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDI), -4); in emit_epilogue()
1299 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(r2[0])); in emit_bpf_tail_call()
1301 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX), STACK_VAR(r3[0])); in emit_bpf_tail_call()
1304 EMIT3(0x39, add_2reg(0x40, IA32_EAX, IA32_EDX), in emit_bpf_tail_call()
1315 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX), STACK_VAR(tcc[0])); in emit_bpf_tail_call()
1316 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EBX), STACK_VAR(tcc[1])); in emit_bpf_tail_call()
1333 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_ECX), STACK_VAR(tcc[0])); in emit_bpf_tail_call()
1335 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EBX), STACK_VAR(tcc[1])); in emit_bpf_tail_call()
1346 EMIT2(0x85, add_2reg(0xC0, IA32_EDX, IA32_EDX)); in emit_bpf_tail_call()
1352 EMIT3(0x8B, add_2reg(0x40, IA32_EDX, IA32_EDX), in emit_bpf_tail_call()
1358 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(r1[0])); in emit_bpf_tail_call()
1381 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX), STACK_VAR(src_hi)); in emit_push_r64()
1386 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX), STACK_VAR(src_lo)); in emit_push_r64()
1715 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in do_jit()
1719 EMIT2(0x8B, add_2reg(0xC0, dst_lo, IA32_EAX)); in do_jit()
1755 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in do_jit()
1759 EMIT2(0x8B, add_2reg(0xC0, dst_lo, IA32_EAX)); in do_jit()
1763 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX), in do_jit()
1767 EMIT2(0x8B, add_2reg(0xC0, src_lo, IA32_EDX)); in do_jit()
1780 EMIT2(add_2reg(0x40, IA32_EAX, IA32_EDX), in do_jit()
1783 EMIT1_off32(add_2reg(0x80, IA32_EAX, IA32_EDX), in do_jit()
1789 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, in do_jit()
1794 EMIT2(0x8B, add_2reg(0xC0, src_hi, in do_jit()
1798 EMIT2(add_2reg(0x40, IA32_EAX, in do_jit()
1802 EMIT1(add_2reg(0x80, IA32_EAX, in do_jit()
1816 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in do_jit()
1820 EMIT2(0x8B, add_2reg(0xC0, src_lo, IA32_EAX)); in do_jit()
1833 EMIT2(add_2reg(0x40, IA32_EAX, IA32_EDX), in do_jit()
1836 EMIT1_off32(add_2reg(0x80, IA32_EAX, IA32_EDX), in do_jit()
1841 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EDX), in do_jit()
1845 EMIT2(0x89, add_2reg(0xC0, dst_lo, IA32_EDX)); in do_jit()
1862 add_2reg(0x80, IA32_EAX, IA32_EDX), in do_jit()
1866 add_2reg(0x40, IA32_EBP, in do_jit()
1871 add_2reg(0xC0, dst_hi, IA32_EDX)); in do_jit()
1899 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in do_jit()
1902 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX), in do_jit()
1913 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EAX), in do_jit()
1916 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EDX), in do_jit()
1951 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in do_jit()
1955 add_2reg(0x40, IA32_EBP, in do_jit()
1961 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX), in do_jit()
1965 add_2reg(0x40, IA32_EBP, in do_jit()
1972 EMIT2(0x39, add_2reg(0xC0, dreg_hi, sreg_hi)); in do_jit()
1976 EMIT2(0x39, add_2reg(0xC0, dreg_lo, sreg_lo)); in do_jit()
1989 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in do_jit()
1992 add_2reg(0x40, IA32_EBP, in do_jit()
1998 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX), in do_jit()
2001 add_2reg(0x40, IA32_EBP, in do_jit()
2007 EMIT2(0x39, add_2reg(0xC0, dreg_hi, sreg_hi)); in do_jit()
2010 EMIT2(0x39, add_2reg(0xC0, dreg_lo, sreg_lo)); in do_jit()
2022 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in do_jit()
2026 add_2reg(0x40, IA32_EBP, in do_jit()
2032 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX), in do_jit()
2036 add_2reg(0x40, IA32_EBP, in do_jit()
2041 EMIT2(0x23, add_2reg(0xC0, sreg_lo, dreg_lo)); in do_jit()
2043 EMIT2(0x23, add_2reg(0xC0, sreg_hi, dreg_hi)); in do_jit()
2045 EMIT2(0x09, add_2reg(0xC0, dreg_lo, dreg_hi)); in do_jit()
2058 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in do_jit()
2062 add_2reg(0x40, IA32_EBP, in do_jit()
2071 EMIT2(0x23, add_2reg(0xC0, sreg_lo, dreg_lo)); in do_jit()
2077 EMIT2(0x23, add_2reg(0xC0, sreg_hi, dreg_hi)); in do_jit()
2079 EMIT2(0x09, add_2reg(0xC0, dreg_lo, dreg_hi)); in do_jit()
2107 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in do_jit()
2111 add_2reg(0x40, IA32_EBP, in do_jit()
2123 EMIT2(0x39, add_2reg(0xC0, dreg_hi, sreg_hi)); in do_jit()
2127 EMIT2(0x39, add_2reg(0xC0, dreg_lo, sreg_lo)); in do_jit()
2154 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in do_jit()
2157 add_2reg(0x40, IA32_EBP, in do_jit()
2168 EMIT2(0x39, add_2reg(0xC0, dreg_hi, sreg_hi)); in do_jit()
2171 EMIT2(0x39, add_2reg(0xC0, dreg_lo, sreg_lo)); in do_jit()