Lines Matching refs:msr_bitmap

346 static __always_inline void vmx_disable_intercept_for_msr(unsigned long *msr_bitmap,
813 unsigned long *msr_bitmap; in msr_write_intercepted() local
819 msr_bitmap = to_vmx(vcpu)->loaded_vmcs->msr_bitmap; in msr_write_intercepted()
822 return !!test_bit(msr, msr_bitmap + 0x800 / f); in msr_write_intercepted()
825 return !!test_bit(msr, msr_bitmap + 0xc00 / f); in msr_write_intercepted()
2000 vmx_disable_intercept_for_msr(vmx->vmcs01.msr_bitmap, in vmx_set_msr()
2028 vmx_disable_intercept_for_msr(vmx->vmcs01.msr_bitmap, MSR_IA32_PRED_CMD, in vmx_set_msr()
2568 if (loaded_vmcs->msr_bitmap) in free_loaded_vmcs()
2569 free_page((unsigned long)loaded_vmcs->msr_bitmap); in free_loaded_vmcs()
2584 loaded_vmcs->msr_bitmap = (unsigned long *) in alloc_loaded_vmcs()
2586 if (!loaded_vmcs->msr_bitmap) in alloc_loaded_vmcs()
2588 memset(loaded_vmcs->msr_bitmap, 0xff, PAGE_SIZE); in alloc_loaded_vmcs()
2596 evmcs->hv_enlightenments_control.msr_bitmap = 1; in alloc_loaded_vmcs()
3593 static __always_inline void vmx_disable_intercept_for_msr(unsigned long *msr_bitmap, in vmx_disable_intercept_for_msr() argument
3612 __clear_bit(msr, msr_bitmap + 0x000 / f); in vmx_disable_intercept_for_msr()
3616 __clear_bit(msr, msr_bitmap + 0x800 / f); in vmx_disable_intercept_for_msr()
3622 __clear_bit(msr, msr_bitmap + 0x400 / f); in vmx_disable_intercept_for_msr()
3626 __clear_bit(msr, msr_bitmap + 0xc00 / f); in vmx_disable_intercept_for_msr()
3631 static __always_inline void vmx_enable_intercept_for_msr(unsigned long *msr_bitmap, in vmx_enable_intercept_for_msr() argument
3650 __set_bit(msr, msr_bitmap + 0x000 / f); in vmx_enable_intercept_for_msr()
3654 __set_bit(msr, msr_bitmap + 0x800 / f); in vmx_enable_intercept_for_msr()
3660 __set_bit(msr, msr_bitmap + 0x400 / f); in vmx_enable_intercept_for_msr()
3664 __set_bit(msr, msr_bitmap + 0xc00 / f); in vmx_enable_intercept_for_msr()
3669 static __always_inline void vmx_set_intercept_for_msr(unsigned long *msr_bitmap, in vmx_set_intercept_for_msr() argument
3673 vmx_enable_intercept_for_msr(msr_bitmap, msr, type); in vmx_set_intercept_for_msr()
3675 vmx_disable_intercept_for_msr(msr_bitmap, msr, type); in vmx_set_intercept_for_msr()
3693 static void vmx_update_msr_bitmap_x2apic(unsigned long *msr_bitmap, in vmx_update_msr_bitmap_x2apic() argument
3700 msr_bitmap[word] = (mode & MSR_BITMAP_MODE_X2APIC_APICV) ? 0 : ~0; in vmx_update_msr_bitmap_x2apic()
3701 msr_bitmap[word + (0x800 / sizeof(long))] = ~0; in vmx_update_msr_bitmap_x2apic()
3709 vmx_disable_intercept_for_msr(msr_bitmap, X2APIC_MSR(APIC_TASKPRI), MSR_TYPE_RW); in vmx_update_msr_bitmap_x2apic()
3711 vmx_enable_intercept_for_msr(msr_bitmap, X2APIC_MSR(APIC_TMCCT), MSR_TYPE_R); in vmx_update_msr_bitmap_x2apic()
3712 vmx_disable_intercept_for_msr(msr_bitmap, X2APIC_MSR(APIC_EOI), MSR_TYPE_W); in vmx_update_msr_bitmap_x2apic()
3713 vmx_disable_intercept_for_msr(msr_bitmap, X2APIC_MSR(APIC_SELF_IPI), MSR_TYPE_W); in vmx_update_msr_bitmap_x2apic()
3721 unsigned long *msr_bitmap = vmx->vmcs01.msr_bitmap; in vmx_update_msr_bitmap() local
3729 vmx_update_msr_bitmap_x2apic(msr_bitmap, mode); in vmx_update_msr_bitmap()
3736 unsigned long *msr_bitmap = vmx->vmcs01.msr_bitmap; in pt_update_intercept_for_msr() local
3740 vmx_set_intercept_for_msr(msr_bitmap, MSR_IA32_RTIT_STATUS, in pt_update_intercept_for_msr()
3742 vmx_set_intercept_for_msr(msr_bitmap, MSR_IA32_RTIT_OUTPUT_BASE, in pt_update_intercept_for_msr()
3744 vmx_set_intercept_for_msr(msr_bitmap, MSR_IA32_RTIT_OUTPUT_MASK, in pt_update_intercept_for_msr()
3746 vmx_set_intercept_for_msr(msr_bitmap, MSR_IA32_RTIT_CR3_MATCH, in pt_update_intercept_for_msr()
3749 vmx_set_intercept_for_msr(msr_bitmap, in pt_update_intercept_for_msr()
3751 vmx_set_intercept_for_msr(msr_bitmap, in pt_update_intercept_for_msr()
4171 vmcs_write64(MSR_BITMAP, __pa(vmx->vmcs01.msr_bitmap)); in vmx_vcpu_setup()
6702 unsigned long *msr_bitmap; in vmx_create_vcpu() local
6759 msr_bitmap = vmx->vmcs01.msr_bitmap; in vmx_create_vcpu()
6760 vmx_disable_intercept_for_msr(msr_bitmap, MSR_IA32_TSC, MSR_TYPE_R); in vmx_create_vcpu()
6761 vmx_disable_intercept_for_msr(msr_bitmap, MSR_FS_BASE, MSR_TYPE_RW); in vmx_create_vcpu()
6762 vmx_disable_intercept_for_msr(msr_bitmap, MSR_GS_BASE, MSR_TYPE_RW); in vmx_create_vcpu()
6763 vmx_disable_intercept_for_msr(msr_bitmap, MSR_KERNEL_GS_BASE, MSR_TYPE_RW); in vmx_create_vcpu()
6764 vmx_disable_intercept_for_msr(msr_bitmap, MSR_IA32_SYSENTER_CS, MSR_TYPE_RW); in vmx_create_vcpu()
6765 vmx_disable_intercept_for_msr(msr_bitmap, MSR_IA32_SYSENTER_ESP, MSR_TYPE_RW); in vmx_create_vcpu()
6766 vmx_disable_intercept_for_msr(msr_bitmap, MSR_IA32_SYSENTER_EIP, MSR_TYPE_RW); in vmx_create_vcpu()
6768 vmx_disable_intercept_for_msr(msr_bitmap, MSR_CORE_C1_RES, MSR_TYPE_R); in vmx_create_vcpu()
6769 vmx_disable_intercept_for_msr(msr_bitmap, MSR_CORE_C3_RESIDENCY, MSR_TYPE_R); in vmx_create_vcpu()
6770 vmx_disable_intercept_for_msr(msr_bitmap, MSR_CORE_C6_RESIDENCY, MSR_TYPE_R); in vmx_create_vcpu()
6771 vmx_disable_intercept_for_msr(msr_bitmap, MSR_CORE_C7_RESIDENCY, MSR_TYPE_R); in vmx_create_vcpu()