Lines Matching full:pmu

3  * KVM PMU support for AMD
18 #include "pmu.h"
47 static unsigned int get_msr_base(struct kvm_pmu *pmu, enum pmu_type type) in get_msr_base() argument
49 struct kvm_vcpu *vcpu = pmu_to_vcpu(pmu); in get_msr_base()
98 static inline struct kvm_pmc *get_gp_pmc_amd(struct kvm_pmu *pmu, u32 msr, in get_gp_pmc_amd() argument
126 return &pmu->gp_counters[msr_to_index(msr)]; in get_gp_pmc_amd()
129 static unsigned amd_find_arch_event(struct kvm_pmu *pmu, in amd_find_arch_event() argument
160 static struct kvm_pmc *amd_pmc_idx_to_pmc(struct kvm_pmu *pmu, int pmc_idx) in amd_pmc_idx_to_pmc() argument
162 unsigned int base = get_msr_base(pmu, PMU_TYPE_COUNTER); in amd_pmc_idx_to_pmc()
163 struct kvm_vcpu *vcpu = pmu_to_vcpu(pmu); in amd_pmc_idx_to_pmc()
173 return get_gp_pmc_amd(pmu, base + pmc_idx, PMU_TYPE_COUNTER); in amd_pmc_idx_to_pmc()
179 struct kvm_pmu *pmu = vcpu_to_pmu(vcpu); in amd_is_valid_msr_idx() local
183 return (idx >= pmu->nr_arch_gp_counters); in amd_is_valid_msr_idx()
189 struct kvm_pmu *pmu = vcpu_to_pmu(vcpu); in amd_msr_idx_to_pmc() local
193 if (idx >= pmu->nr_arch_gp_counters) in amd_msr_idx_to_pmc()
195 counters = pmu->gp_counters; in amd_msr_idx_to_pmc()
202 struct kvm_pmu *pmu = vcpu_to_pmu(vcpu); in amd_is_valid_msr() local
205 ret = get_gp_pmc_amd(pmu, msr, PMU_TYPE_COUNTER) || in amd_is_valid_msr()
206 get_gp_pmc_amd(pmu, msr, PMU_TYPE_EVNTSEL); in amd_is_valid_msr()
213 struct kvm_pmu *pmu = vcpu_to_pmu(vcpu); in amd_pmu_get_msr() local
217 pmc = get_gp_pmc_amd(pmu, msr, PMU_TYPE_COUNTER); in amd_pmu_get_msr()
223 pmc = get_gp_pmc_amd(pmu, msr, PMU_TYPE_EVNTSEL); in amd_pmu_get_msr()
234 struct kvm_pmu *pmu = vcpu_to_pmu(vcpu); in amd_pmu_set_msr() local
240 pmc = get_gp_pmc_amd(pmu, msr, PMU_TYPE_COUNTER); in amd_pmu_set_msr()
246 pmc = get_gp_pmc_amd(pmu, msr, PMU_TYPE_EVNTSEL); in amd_pmu_set_msr()
250 if (!(data & pmu->reserved_bits)) { in amd_pmu_set_msr()
261 struct kvm_pmu *pmu = vcpu_to_pmu(vcpu); in amd_pmu_refresh() local
264 pmu->nr_arch_gp_counters = AMD64_NUM_COUNTERS_CORE; in amd_pmu_refresh()
266 pmu->nr_arch_gp_counters = AMD64_NUM_COUNTERS; in amd_pmu_refresh()
268 pmu->counter_bitmask[KVM_PMC_GP] = ((u64)1 << 48) - 1; in amd_pmu_refresh()
269 pmu->reserved_bits = 0xffffffff00200000ull; in amd_pmu_refresh()
270 pmu->version = 1; in amd_pmu_refresh()
272 pmu->counter_bitmask[KVM_PMC_FIXED] = 0; in amd_pmu_refresh()
273 pmu->nr_arch_fixed_counters = 0; in amd_pmu_refresh()
274 pmu->global_status = 0; in amd_pmu_refresh()
279 struct kvm_pmu *pmu = vcpu_to_pmu(vcpu); in amd_pmu_init() local
285 pmu->gp_counters[i].type = KVM_PMC_GP; in amd_pmu_init()
286 pmu->gp_counters[i].vcpu = vcpu; in amd_pmu_init()
287 pmu->gp_counters[i].idx = i; in amd_pmu_init()
293 struct kvm_pmu *pmu = vcpu_to_pmu(vcpu); in amd_pmu_reset() local
297 struct kvm_pmc *pmc = &pmu->gp_counters[i]; in amd_pmu_reset()