Lines Matching refs:F
65 #define F(x) bit(X86_FEATURE_##x) macro
78 best->ecx &= ~F(OSXSAVE); in kvm_update_cpuid()
80 best->ecx |= F(OSXSAVE); in kvm_update_cpuid()
83 best->edx &= ~F(APIC); in kvm_update_cpuid()
85 best->edx |= F(APIC); in kvm_update_cpuid()
88 if (best->ecx & F(TSC_DEADLINE_TIMER)) in kvm_update_cpuid()
98 best->ecx &= ~F(OSPKE); in kvm_update_cpuid()
100 best->ecx |= F(OSPKE); in kvm_update_cpuid()
117 if (best && (best->eax & (F(XSAVES) | F(XSAVEC)))) in kvm_update_cpuid()
141 best->ecx |= F(MWAIT); in kvm_update_cpuid()
143 best->ecx &= ~F(MWAIT); in kvm_update_cpuid()
176 if (entry && (entry->edx & F(NX)) && !is_efer_nx()) { in cpuid_fix_nx_cap()
177 entry->edx &= ~F(NX); in cpuid_fix_nx_cap()
333 entry->ecx = F(MOVBE); in __do_cpuid_func_emulated()
339 entry->ecx = F(RDPID); in __do_cpuid_func_emulated()
350 unsigned f_invpcid = kvm_x86_ops->invpcid_supported() ? F(INVPCID) : 0; in do_cpuid_7_mask()
351 unsigned f_mpx = kvm_mpx_supported() ? F(MPX) : 0; in do_cpuid_7_mask()
352 unsigned f_umip = kvm_x86_ops->umip_emulated() ? F(UMIP) : 0; in do_cpuid_7_mask()
353 unsigned f_intel_pt = kvm_x86_ops->pt_supported() ? F(INTEL_PT) : 0; in do_cpuid_7_mask()
358 F(FSGSBASE) | F(BMI1) | F(HLE) | F(AVX2) | F(SMEP) | in do_cpuid_7_mask()
359 F(BMI2) | F(ERMS) | f_invpcid | F(RTM) | f_mpx | F(RDSEED) | in do_cpuid_7_mask()
360 F(ADX) | F(SMAP) | F(AVX512IFMA) | F(AVX512F) | F(AVX512PF) | in do_cpuid_7_mask()
361 F(AVX512ER) | F(AVX512CD) | F(CLFLUSHOPT) | F(CLWB) | F(AVX512DQ) | in do_cpuid_7_mask()
362 F(SHA_NI) | F(AVX512BW) | F(AVX512VL) | f_intel_pt; in do_cpuid_7_mask()
366 F(AVX512VBMI) | F(LA57) | F(PKU) | 0 /*OSPKE*/ | F(RDPID) | in do_cpuid_7_mask()
367 F(AVX512_VPOPCNTDQ) | F(UMIP) | F(AVX512_VBMI2) | F(GFNI) | in do_cpuid_7_mask()
368 F(VAES) | F(VPCLMULQDQ) | F(AVX512_VNNI) | F(AVX512_BITALG) | in do_cpuid_7_mask()
369 F(CLDEMOTE) | F(MOVDIRI) | F(MOVDIR64B) | 0 /*WAITPKG*/; in do_cpuid_7_mask()
373 F(AVX512_4VNNIW) | F(AVX512_4FMAPS) | F(SPEC_CTRL) | in do_cpuid_7_mask()
374 F(SPEC_CTRL_SSBD) | F(ARCH_CAPABILITIES) | F(INTEL_STIBP) | in do_cpuid_7_mask()
375 F(MD_CLEAR); in do_cpuid_7_mask()
379 F(AVX512_BF16); in do_cpuid_7_mask()
387 entry->ebx |= F(TSC_ADJUST); in do_cpuid_7_mask()
390 f_la57 = entry->ecx & F(LA57); in do_cpuid_7_mask()
397 entry->ecx &= ~F(PKU); in do_cpuid_7_mask()
402 entry->edx |= F(SPEC_CTRL); in do_cpuid_7_mask()
404 entry->edx |= F(INTEL_STIBP); in do_cpuid_7_mask()
406 entry->edx |= F(SPEC_CTRL_SSBD); in do_cpuid_7_mask()
411 entry->edx |= F(ARCH_CAPABILITIES); in do_cpuid_7_mask()
433 unsigned f_nx = is_efer_nx() ? F(NX) : 0; in __do_cpuid_func()
436 ? F(GBPAGES) : 0; in __do_cpuid_func()
437 unsigned f_lm = F(LM); in __do_cpuid_func()
442 unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0; in __do_cpuid_func()
443 unsigned f_xsaves = kvm_x86_ops->xsaves_supported() ? F(XSAVES) : 0; in __do_cpuid_func()
444 unsigned f_intel_pt = kvm_x86_ops->pt_supported() ? F(INTEL_PT) : 0; in __do_cpuid_func()
448 F(FPU) | F(VME) | F(DE) | F(PSE) | in __do_cpuid_func()
449 F(TSC) | F(MSR) | F(PAE) | F(MCE) | in __do_cpuid_func()
450 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) | in __do_cpuid_func()
451 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) | in __do_cpuid_func()
452 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLUSH) | in __do_cpuid_func()
453 0 /* Reserved, DS, ACPI */ | F(MMX) | in __do_cpuid_func()
454 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) | in __do_cpuid_func()
458 F(FPU) | F(VME) | F(DE) | F(PSE) | in __do_cpuid_func()
459 F(TSC) | F(MSR) | F(PAE) | F(MCE) | in __do_cpuid_func()
460 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) | in __do_cpuid_func()
461 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) | in __do_cpuid_func()
462 F(PAT) | F(PSE36) | 0 /* Reserved */ | in __do_cpuid_func()
463 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) | in __do_cpuid_func()
464 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp | in __do_cpuid_func()
465 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW); in __do_cpuid_func()
470 F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ | in __do_cpuid_func()
472 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ | in __do_cpuid_func()
473 F(FMA) | F(CX16) | 0 /* xTPR Update, PDCM */ | in __do_cpuid_func()
474 F(PCID) | 0 /* Reserved, DCA */ | F(XMM4_1) | in __do_cpuid_func()
475 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) | in __do_cpuid_func()
476 0 /* Reserved*/ | F(AES) | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX) | in __do_cpuid_func()
477 F(F16C) | F(RDRAND); in __do_cpuid_func()
480 F(LAHF_LM) | F(CMP_LEGACY) | 0 /*SVM*/ | 0 /* ExtApicSpace */ | in __do_cpuid_func()
481 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) | in __do_cpuid_func()
482 F(3DNOWPREFETCH) | F(OSVW) | 0 /* IBS */ | F(XOP) | in __do_cpuid_func()
483 0 /* SKINIT, WDT, LWP */ | F(FMA4) | F(TBM) | in __do_cpuid_func()
484 F(TOPOEXT) | F(PERFCTR_CORE); in __do_cpuid_func()
488 F(CLZERO) | F(XSAVEERPTR) | in __do_cpuid_func()
489 F(WBNOINVD) | F(AMD_IBPB) | F(AMD_IBRS) | F(AMD_SSBD) | F(VIRT_SSBD) | in __do_cpuid_func()
490 F(AMD_SSB_NO) | F(AMD_STIBP) | F(AMD_STIBP_ALWAYS_ON); in __do_cpuid_func()
494 F(XSTORE) | F(XSTORE_EN) | F(XCRYPT) | F(XCRYPT_EN) | in __do_cpuid_func()
495 F(ACE2) | F(ACE2_EN) | F(PHE) | F(PHE_EN) | in __do_cpuid_func()
496 F(PMM) | F(PMM_EN); in __do_cpuid_func()
500 F(XSAVEOPT) | F(XSAVEC) | F(XGETBV1) | f_xsaves; in __do_cpuid_func()
525 entry->ecx |= F(X2APIC); in __do_cpuid_func()
662 if (entry[i].eax & (F(XSAVES)|F(XSAVEC))) in __do_cpuid_func()
757 entry->ebx |= F(AMD_IBPB); in __do_cpuid_func()
759 entry->ebx |= F(AMD_IBRS); in __do_cpuid_func()
761 entry->ebx |= F(AMD_STIBP); in __do_cpuid_func()
763 entry->ebx |= F(AMD_SSBD); in __do_cpuid_func()
765 entry->ebx |= F(AMD_SSB_NO); in __do_cpuid_func()
772 entry->ebx |= F(VIRT_SSBD); in __do_cpuid_func()
819 #undef F