Lines Matching refs:tifn
274 unsigned long tifp, unsigned long tifn) in switch_to_bitmap() argument
278 if (tifn & _TIF_IO_BITMAP) { in switch_to_bitmap()
360 static __always_inline void amd_set_core_ssb_state(unsigned long tifn) in amd_set_core_ssb_state() argument
366 msr |= ssbd_tif_to_amd_ls_cfg(tifn); in amd_set_core_ssb_state()
371 if (tifn & _TIF_SSBD) { in amd_set_core_ssb_state()
399 static __always_inline void amd_set_core_ssb_state(unsigned long tifn) in amd_set_core_ssb_state() argument
401 u64 msr = x86_amd_ls_cfg_base | ssbd_tif_to_amd_ls_cfg(tifn); in amd_set_core_ssb_state()
407 static __always_inline void amd_set_ssb_virt_state(unsigned long tifn) in amd_set_ssb_virt_state() argument
413 wrmsrl(MSR_AMD64_VIRT_SPEC_CTRL, ssbd_tif_to_spec_ctrl(tifn)); in amd_set_ssb_virt_state()
423 unsigned long tifn) in __speculation_ctrl_update() argument
425 unsigned long tif_diff = tifp ^ tifn; in __speculation_ctrl_update()
439 amd_set_ssb_virt_state(tifn); in __speculation_ctrl_update()
441 amd_set_core_ssb_state(tifn); in __speculation_ctrl_update()
444 msr |= ssbd_tif_to_spec_ctrl(tifn); in __speculation_ctrl_update()
456 msr |= stibp_tif_to_spec_ctrl(tifn); in __speculation_ctrl_update()
501 unsigned long tifp, tifn; in __switch_to_xtra() local
506 tifn = READ_ONCE(task_thread_info(next_p)->flags); in __switch_to_xtra()
508 switch_to_bitmap(prev, next, tifp, tifn); in __switch_to_xtra()
512 if ((tifp & _TIF_BLOCKSTEP || tifn & _TIF_BLOCKSTEP) && in __switch_to_xtra()
518 msk = tifn & _TIF_BLOCKSTEP; in __switch_to_xtra()
523 if ((tifp ^ tifn) & _TIF_NOTSC) in __switch_to_xtra()
526 if ((tifp ^ tifn) & _TIF_NOCPUID) in __switch_to_xtra()
527 set_cpuid_faulting(!!(tifn & _TIF_NOCPUID)); in __switch_to_xtra()
529 if (likely(!((tifp | tifn) & _TIF_SPEC_FORCE_UPDATE))) { in __switch_to_xtra()
530 __speculation_ctrl_update(tifp, tifn); in __switch_to_xtra()
533 tifn = speculation_ctrl_update_tif(next_p); in __switch_to_xtra()
536 __speculation_ctrl_update(~tifn, tifn); in __switch_to_xtra()