Lines Matching refs:var

28 #define PER_CPU(var, reg)						\  argument
30 lea var(reg), reg
31 #define PER_CPU_VAR(var) %__percpu_seg:var argument
33 #define PER_CPU(var, reg) __percpu_mov_op $var, reg argument
34 #define PER_CPU_VAR(var) var argument
38 #define INIT_PER_CPU_VAR(var) init_per_cpu__##var argument
40 #define INIT_PER_CPU_VAR(var) var argument
77 #define DECLARE_INIT_PER_CPU(var) \ argument
78 extern typeof(var) init_per_cpu_var(var)
81 #define init_per_cpu_var(var) init_per_cpu__##var argument
83 #define init_per_cpu_var(var) var argument
90 #define percpu_to_op(qual, op, var, val) \ argument
92 typedef typeof(var) pto_T__; \
98 switch (sizeof(var)) { \
101 : "+m" (var) \
106 : "+m" (var) \
111 : "+m" (var) \
116 : "+m" (var) \
127 #define percpu_add_op(qual, var, val) \ argument
129 typedef typeof(var) pao_T__; \
138 switch (sizeof(var)) { \
141 asm qual ("incb "__percpu_arg(0) : "+m" (var)); \
143 asm qual ("decb "__percpu_arg(0) : "+m" (var)); \
146 : "+m" (var) \
151 asm qual ("incw "__percpu_arg(0) : "+m" (var)); \
153 asm qual ("decw "__percpu_arg(0) : "+m" (var)); \
156 : "+m" (var) \
161 asm qual ("incl "__percpu_arg(0) : "+m" (var)); \
163 asm qual ("decl "__percpu_arg(0) : "+m" (var)); \
166 : "+m" (var) \
171 asm qual ("incq "__percpu_arg(0) : "+m" (var)); \
173 asm qual ("decq "__percpu_arg(0) : "+m" (var)); \
176 : "+m" (var) \
183 #define percpu_from_op(qual, op, var) \ argument
185 typeof(var) pfo_ret__; \
186 switch (sizeof(var)) { \
190 : "m" (var)); \
195 : "m" (var)); \
200 : "m" (var)); \
205 : "m" (var)); \
212 #define percpu_stable_op(op, var) \ argument
214 typeof(var) pfo_ret__; \
215 switch (sizeof(var)) { \
219 : "p" (&(var))); \
224 : "p" (&(var))); \
229 : "p" (&(var))); \
234 : "p" (&(var))); \
241 #define percpu_unary_op(qual, op, var) \ argument
243 switch (sizeof(var)) { \
246 : "+m" (var)); \
250 : "+m" (var)); \
254 : "+m" (var)); \
258 : "+m" (var)); \
267 #define percpu_add_return_op(qual, var, val) \ argument
269 typeof(var) paro_ret__ = val; \
270 switch (sizeof(var)) { \
273 : "+q" (paro_ret__), "+m" (var) \
278 : "+r" (paro_ret__), "+m" (var) \
283 : "+r" (paro_ret__), "+m" (var) \
288 : "+re" (paro_ret__), "+m" (var) \
302 #define percpu_xchg_op(qual, var, nval) \ argument
304 typeof(var) pxo_ret__; \
305 typeof(var) pxo_new__ = (nval); \
306 switch (sizeof(var)) { \
311 : "=&a" (pxo_ret__), "+m" (var) \
319 : "=&a" (pxo_ret__), "+m" (var) \
327 : "=&a" (pxo_ret__), "+m" (var) \
335 : "=&a" (pxo_ret__), "+m" (var) \
348 #define percpu_cmpxchg_op(qual, var, oval, nval) \ argument
350 typeof(var) pco_ret__; \
351 typeof(var) pco_old__ = (oval); \
352 typeof(var) pco_new__ = (nval); \
353 switch (sizeof(var)) { \
356 : "=a" (pco_ret__), "+m" (var) \
362 : "=a" (pco_ret__), "+m" (var) \
368 : "=a" (pco_ret__), "+m" (var) \
374 : "=a" (pco_ret__), "+m" (var) \
392 #define this_cpu_read_stable(var) percpu_stable_op("mov", var) argument
415 #define raw_percpu_xchg_op(var, nval) \ argument
417 typeof(var) pxo_ret__ = raw_cpu_read(var); \
418 raw_cpu_write(var, (nval)); \