Lines Matching refs:x86_pmu
162 if (pmi && x86_pmu.version >= 4) in __intel_pmu_lbr_enable()
170 lbr_select = cpuc->lbr_sel->config & x86_pmu.lbr_sel_mask; in __intel_pmu_lbr_enable()
201 for (i = 0; i < x86_pmu.lbr_nr; i++) in intel_pmu_lbr_reset_32()
202 wrmsrl(x86_pmu.lbr_from + i, 0); in intel_pmu_lbr_reset_32()
209 for (i = 0; i < x86_pmu.lbr_nr; i++) { in intel_pmu_lbr_reset_64()
210 wrmsrl(x86_pmu.lbr_from + i, 0); in intel_pmu_lbr_reset_64()
211 wrmsrl(x86_pmu.lbr_to + i, 0); in intel_pmu_lbr_reset_64()
212 if (x86_pmu.intel_cap.lbr_format == LBR_FORMAT_INFO) in intel_pmu_lbr_reset_64()
221 if (!x86_pmu.lbr_nr) in intel_pmu_lbr_reset()
224 if (x86_pmu.intel_cap.lbr_format == LBR_FORMAT_32) in intel_pmu_lbr_reset()
240 rdmsrl(x86_pmu.lbr_tos, tos); in intel_pmu_lbr_tos()
269 int lbr_format = x86_pmu.intel_cap.lbr_format; in lbr_from_signext_quirk_needed()
314 wrmsrl(x86_pmu.lbr_from + idx, val); in wrlbr_from()
319 wrmsrl(x86_pmu.lbr_to + idx, val); in wrlbr_to()
326 rdmsrl(x86_pmu.lbr_from + idx, val); in rdlbr_from()
335 rdmsrl(x86_pmu.lbr_to + idx, val); in rdlbr_to()
366 mask = x86_pmu.lbr_nr - 1; in __intel_pmu_lbr_restore()
372 if (x86_pmu.intel_cap.lbr_format == LBR_FORMAT_INFO) in __intel_pmu_lbr_restore()
376 for (; i < x86_pmu.lbr_nr; i++) { in __intel_pmu_lbr_restore()
380 if (x86_pmu.intel_cap.lbr_format == LBR_FORMAT_INFO) in __intel_pmu_lbr_restore()
384 wrmsrl(x86_pmu.lbr_tos, tos); in __intel_pmu_lbr_restore()
400 mask = x86_pmu.lbr_nr - 1; in __intel_pmu_lbr_save()
402 for (i = 0; i < x86_pmu.lbr_nr; i++) { in __intel_pmu_lbr_save()
409 if (x86_pmu.intel_cap.lbr_format == LBR_FORMAT_INFO) in __intel_pmu_lbr_save()
462 if (!x86_pmu.lbr_nr) in intel_pmu_lbr_add()
491 if (x86_pmu.intel_cap.pebs_baseline && event->attr.precise_ip > 0) in intel_pmu_lbr_add()
503 if (!x86_pmu.lbr_nr) in intel_pmu_lbr_del()
512 if (x86_pmu.intel_cap.pebs_baseline && event->attr.precise_ip > 0) in intel_pmu_lbr_del()
538 unsigned long mask = x86_pmu.lbr_nr - 1; in intel_pmu_lbr_read_32()
542 for (i = 0; i < x86_pmu.lbr_nr; i++) { in intel_pmu_lbr_read_32()
552 rdmsrl(x86_pmu.lbr_from + lbr_idx, msr_lastbranch.lbr); in intel_pmu_lbr_read_32()
575 unsigned long mask = x86_pmu.lbr_nr - 1; in intel_pmu_lbr_read_64()
576 int lbr_format = x86_pmu.intel_cap.lbr_format; in intel_pmu_lbr_read_64()
580 int num = x86_pmu.lbr_nr; in intel_pmu_lbr_read_64()
645 if (abort && x86_pmu.lbr_double_abort && out > 0) in intel_pmu_lbr_read_64()
675 if (x86_pmu.intel_cap.lbr_format == LBR_FORMAT_32) in intel_pmu_lbr_read()
767 v = x86_pmu.lbr_sel_map[i]; in intel_pmu_setup_hw_lbr_filter()
785 reg->config = mask ^ (x86_pmu.lbr_sel_mask & ~LBR_CALL_STACK); in intel_pmu_setup_hw_lbr_filter()
789 (x86_pmu.intel_cap.lbr_format == LBR_FORMAT_INFO)) in intel_pmu_setup_hw_lbr_filter()
802 if (!x86_pmu.lbr_nr) in intel_pmu_setup_lbr_filter()
815 if (x86_pmu.lbr_sel_map) in intel_pmu_setup_lbr_filter()
1099 cpuc->lbr_stack.nr = x86_pmu.lbr_nr; in intel_pmu_store_pebs_lbrs()
1100 for (i = 0; i < x86_pmu.lbr_nr; i++) { in intel_pmu_store_pebs_lbrs()
1172 x86_pmu.lbr_nr = 4; in intel_pmu_lbr_init_core()
1173 x86_pmu.lbr_tos = MSR_LBR_TOS; in intel_pmu_lbr_init_core()
1174 x86_pmu.lbr_from = MSR_LBR_CORE_FROM; in intel_pmu_lbr_init_core()
1175 x86_pmu.lbr_to = MSR_LBR_CORE_TO; in intel_pmu_lbr_init_core()
1186 x86_pmu.lbr_nr = 16; in intel_pmu_lbr_init_nhm()
1187 x86_pmu.lbr_tos = MSR_LBR_TOS; in intel_pmu_lbr_init_nhm()
1188 x86_pmu.lbr_from = MSR_LBR_NHM_FROM; in intel_pmu_lbr_init_nhm()
1189 x86_pmu.lbr_to = MSR_LBR_NHM_TO; in intel_pmu_lbr_init_nhm()
1191 x86_pmu.lbr_sel_mask = LBR_SEL_MASK; in intel_pmu_lbr_init_nhm()
1192 x86_pmu.lbr_sel_map = nhm_lbr_sel_map; in intel_pmu_lbr_init_nhm()
1206 x86_pmu.lbr_nr = 16; in intel_pmu_lbr_init_snb()
1207 x86_pmu.lbr_tos = MSR_LBR_TOS; in intel_pmu_lbr_init_snb()
1208 x86_pmu.lbr_from = MSR_LBR_NHM_FROM; in intel_pmu_lbr_init_snb()
1209 x86_pmu.lbr_to = MSR_LBR_NHM_TO; in intel_pmu_lbr_init_snb()
1211 x86_pmu.lbr_sel_mask = LBR_SEL_MASK; in intel_pmu_lbr_init_snb()
1212 x86_pmu.lbr_sel_map = snb_lbr_sel_map; in intel_pmu_lbr_init_snb()
1225 x86_pmu.lbr_nr = 16; in intel_pmu_lbr_init_hsw()
1226 x86_pmu.lbr_tos = MSR_LBR_TOS; in intel_pmu_lbr_init_hsw()
1227 x86_pmu.lbr_from = MSR_LBR_NHM_FROM; in intel_pmu_lbr_init_hsw()
1228 x86_pmu.lbr_to = MSR_LBR_NHM_TO; in intel_pmu_lbr_init_hsw()
1230 x86_pmu.lbr_sel_mask = LBR_SEL_MASK; in intel_pmu_lbr_init_hsw()
1231 x86_pmu.lbr_sel_map = hsw_lbr_sel_map; in intel_pmu_lbr_init_hsw()
1240 x86_pmu.lbr_nr = 32; in intel_pmu_lbr_init_skl()
1241 x86_pmu.lbr_tos = MSR_LBR_TOS; in intel_pmu_lbr_init_skl()
1242 x86_pmu.lbr_from = MSR_LBR_NHM_FROM; in intel_pmu_lbr_init_skl()
1243 x86_pmu.lbr_to = MSR_LBR_NHM_TO; in intel_pmu_lbr_init_skl()
1245 x86_pmu.lbr_sel_mask = LBR_SEL_MASK; in intel_pmu_lbr_init_skl()
1246 x86_pmu.lbr_sel_map = hsw_lbr_sel_map; in intel_pmu_lbr_init_skl()
1270 x86_pmu.lbr_nr = 8; in intel_pmu_lbr_init_atom()
1271 x86_pmu.lbr_tos = MSR_LBR_TOS; in intel_pmu_lbr_init_atom()
1272 x86_pmu.lbr_from = MSR_LBR_CORE_FROM; in intel_pmu_lbr_init_atom()
1273 x86_pmu.lbr_to = MSR_LBR_CORE_TO; in intel_pmu_lbr_init_atom()
1284 x86_pmu.lbr_nr = 8; in intel_pmu_lbr_init_slm()
1285 x86_pmu.lbr_tos = MSR_LBR_TOS; in intel_pmu_lbr_init_slm()
1286 x86_pmu.lbr_from = MSR_LBR_CORE_FROM; in intel_pmu_lbr_init_slm()
1287 x86_pmu.lbr_to = MSR_LBR_CORE_TO; in intel_pmu_lbr_init_slm()
1289 x86_pmu.lbr_sel_mask = LBR_SEL_MASK; in intel_pmu_lbr_init_slm()
1290 x86_pmu.lbr_sel_map = nhm_lbr_sel_map; in intel_pmu_lbr_init_slm()
1302 x86_pmu.lbr_nr = 8; in intel_pmu_lbr_init_knl()
1303 x86_pmu.lbr_tos = MSR_LBR_TOS; in intel_pmu_lbr_init_knl()
1304 x86_pmu.lbr_from = MSR_LBR_NHM_FROM; in intel_pmu_lbr_init_knl()
1305 x86_pmu.lbr_to = MSR_LBR_NHM_TO; in intel_pmu_lbr_init_knl()
1307 x86_pmu.lbr_sel_mask = LBR_SEL_MASK; in intel_pmu_lbr_init_knl()
1308 x86_pmu.lbr_sel_map = snb_lbr_sel_map; in intel_pmu_lbr_init_knl()
1311 if (x86_pmu.intel_cap.lbr_format == LBR_FORMAT_LIP) in intel_pmu_lbr_init_knl()
1312 x86_pmu.intel_cap.lbr_format = LBR_FORMAT_EIP_FLAGS; in intel_pmu_lbr_init_knl()