Lines Matching full:r1
11 sub r21,r5,r1
12 mmulfx.w r1,r1,r4
13 mshflo.w r1,r63,r1
18 msub.w r1,r4,r1
19 madd.w r1,r1,r1
20 mmulfx.w r1,r1,r4
26 msub.w r1,r4,r1
28 mulu.l r1,r7,r4
29 addi r1,-3,r5
31 sub r63,r4,r4 // Negate to make sure r1 ends up <= 1/r2
34 muls.l r1,r4,r4 /* leaving at least one sign bit. */
36 mshalds.l r1,r21,r1
39 add r1,r4,r1 // 31 bit unsigned reciprocal now in r1 (msb equiv. 0.5)
41 /* Can do second step of 64 : 32 div now, using r1 and the rest in r2. */
44 mulu.l r21,r1,r21
57 mulu.l r2,r1,r7
73 msub.w r1,r4,r1
75 mulu.l r1,r7,r4
76 addi r1,-3,r5
78 sub r63,r4,r4 // Negate to make sure r1 ends up <= 1/r2
81 muls.l r1,r4,r4 /* leaving at least one sign bit. */
84 mshalds.l r1,r21,r1
86 add r1,r4,r1 // 31 bit unsigned reciprocal now in r1 (msb equiv. 0.5)
88 /* Can do second step of 64 : 32 div now, using r1 and the rest in r25. */
91 mulu.l r21,r1,r21