Lines Matching refs:SMSC_SUPERIO_WRITE_INDEXED

78 #define SMSC_SUPERIO_WRITE_INDEXED(val, index) ({ \  macro
118 	SMSC_SUPERIO_WRITE_INDEXED(SMSC_KEYBOARD_DEVICE, SMCS_LOGICAL_DEV_INDEX);  in smsc_superio_setup()
121 	SMSC_SUPERIO_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX);  in smsc_superio_setup()
125 	SMSC_SUPERIO_WRITE_INDEXED(1, SMSC_PRIMARY_INT_INDEX);  in smsc_superio_setup()
126 	SMSC_SUPERIO_WRITE_INDEXED(12, SMSC_SECONDARY_INT_INDEX);  in smsc_superio_setup()
133 	SMSC_SUPERIO_WRITE_INDEXED(1 << SMSC_IDE1_DEVICE, 0x22);  in smsc_superio_setup()
135 	SMSC_SUPERIO_WRITE_INDEXED(SMSC_IDE1_DEVICE, SMCS_LOGICAL_DEV_INDEX);  in smsc_superio_setup()
136 	SMSC_SUPERIO_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX);  in smsc_superio_setup()
138 	SMSC_SUPERIO_WRITE_INDEXED(IDE1_PRIMARY_BASE >> 8,  in smsc_superio_setup()
140 	SMSC_SUPERIO_WRITE_INDEXED(IDE1_PRIMARY_BASE & 0xff,  in smsc_superio_setup()
143 	SMSC_SUPERIO_WRITE_INDEXED(IDE1_SECONDARY_BASE >> 8,  in smsc_superio_setup()
145 	SMSC_SUPERIO_WRITE_INDEXED(IDE1_SECONDARY_BASE & 0xff,  in smsc_superio_setup()
148 	SMSC_SUPERIO_WRITE_INDEXED(14, SMSC_PRIMARY_INT_INDEX);  in smsc_superio_setup()
150 	SMSC_SUPERIO_WRITE_INDEXED(SMSC_CONFIG_REGISTERS,  in smsc_superio_setup()
153 	SMSC_SUPERIO_WRITE_INDEXED(0x00, 0xc2); /* GP42 = nIDE1_OE */  in smsc_superio_setup()
154 	SMSC_SUPERIO_WRITE_INDEXED(0x01, 0xc5); /* GP45 = IDE1_IRQ */  in smsc_superio_setup()
155 	SMSC_SUPERIO_WRITE_INDEXED(0x00, 0xc6); /* GP46 = nIOROP */  in smsc_superio_setup()
156 	SMSC_SUPERIO_WRITE_INDEXED(0x00, 0xc7); /* GP47 = nIOWOP */  in smsc_superio_setup()