Lines Matching refs:xc
215 static int xive_native_setup_queue(unsigned int cpu, struct xive_cpu *xc, u8 prio) in xive_native_setup_queue() argument
217 struct xive_q *q = &xc->queue[prio]; in xive_native_setup_queue()
228 static void xive_native_cleanup_queue(unsigned int cpu, struct xive_cpu *xc, u8 prio) in xive_native_cleanup_queue() argument
230 struct xive_q *q = &xc->queue[prio]; in xive_native_cleanup_queue()
260 static int xive_native_get_ipi(unsigned int cpu, struct xive_cpu *xc) in xive_native_get_ipi() argument
266 irq = opal_xive_allocate_irq(xc->chip_id); in xive_native_get_ipi()
275 xc->hw_ipi = irq; in xive_native_get_ipi()
310 static void xive_native_put_ipi(unsigned int cpu, struct xive_cpu *xc) in xive_native_put_ipi() argument
315 if (!xc->hw_ipi) in xive_native_put_ipi()
318 rc = opal_xive_free_irq(xc->hw_ipi); in xive_native_put_ipi()
323 xc->hw_ipi = 0; in xive_native_put_ipi()
340 static void xive_native_update_pending(struct xive_cpu *xc) in xive_native_update_pending() argument
364 xc->pending_prio |= 1 << cppr; in xive_native_update_pending()
370 if (cppr >= xc->cppr) in xive_native_update_pending()
372 smp_processor_id(), cppr, xc->cppr); in xive_native_update_pending()
375 xc->cppr = cppr; in xive_native_update_pending()
394 static void xive_native_setup_cpu(unsigned int cpu, struct xive_cpu *xc) in xive_native_setup_cpu() argument
434 static void xive_native_teardown_cpu(unsigned int cpu, struct xive_cpu *xc) in xive_native_teardown_cpu() argument