644 	dcr_host_t		dcrs;  member
898 	dcr_write(port->dcrs, DCRO_PEGPL_SPECIAL, 0x68782800);  in ppc440speA_pciex_init_utl()
1025 	dcr_write(port->dcrs, DCRO_PEGPL_SPECIAL, 0x0);  in ppc460ex_pciex_init_utl()
1327 	dcr_write(port->dcrs, DCRO_PEGPL_CFG, 0x10000000);  /* guarded on */  in ppc405ex_pciex_init_port_hw()
1336 	dcr_write(port->dcrs, DCRO_PEGPL_SPECIAL, 0x0);  in ppc405ex_pciex_init_utl()
1466 	dcr_write(port->dcrs, DCRO_PEGPL_CFGBAH,  in ppc4xx_pciex_port_init_mapping()
1468 	dcr_write(port->dcrs, DCRO_PEGPL_CFGBAL,  in ppc4xx_pciex_port_init_mapping()
1472 	dcr_write(port->dcrs, DCRO_PEGPL_CFGMSK, 0xe0000001);  in ppc4xx_pciex_port_init_mapping()
1475 	dcr_write(port->dcrs, DCRO_PEGPL_REGBAH,  in ppc4xx_pciex_port_init_mapping()
1477 	dcr_write(port->dcrs, DCRO_PEGPL_REGBAL,  in ppc4xx_pciex_port_init_mapping()
1481 	dcr_write(port->dcrs, DCRO_PEGPL_REGMSK, 0x00007001);  in ppc4xx_pciex_port_init_mapping()
1484 	dcr_write(port->dcrs, DCRO_PEGPL_OMR1MSKL, 0);  in ppc4xx_pciex_port_init_mapping()
1485 	dcr_write(port->dcrs, DCRO_PEGPL_OMR2MSKL, 0);  in ppc4xx_pciex_port_init_mapping()
1486 	dcr_write(port->dcrs, DCRO_PEGPL_OMR3MSKL, 0);  in ppc4xx_pciex_port_init_mapping()
1487 	dcr_write(port->dcrs, DCRO_PEGPL_MSGMSK, 0);  in ppc4xx_pciex_port_init_mapping()
1624 	gpl_cfg = dcr_read(port->dcrs, DCRO_PEGPL_CFG);  in ppc4xx_pciex_read_config()
1625 	dcr_write(port->dcrs, DCRO_PEGPL_CFG, gpl_cfg | GPL_DMER_MASK_DISA);  in ppc4xx_pciex_read_config()
1655 	dcr_write(port->dcrs, DCRO_PEGPL_CFG, gpl_cfg);  in ppc4xx_pciex_read_config()
1679 	gpl_cfg = dcr_read(port->dcrs, DCRO_PEGPL_CFG);  in ppc4xx_pciex_write_config()
1680 	dcr_write(port->dcrs, DCRO_PEGPL_CFG, gpl_cfg | GPL_DMER_MASK_DISA);  in ppc4xx_pciex_write_config()
1699 	dcr_write(port->dcrs, DCRO_PEGPL_CFG, gpl_cfg);  in ppc4xx_pciex_write_config()
1741 		dcr_write(port->dcrs, DCRO_PEGPL_OMR1BAH, lah);  in ppc4xx_setup_one_pciex_POM()
1742 		dcr_write(port->dcrs, DCRO_PEGPL_OMR1BAL, lal);  in ppc4xx_setup_one_pciex_POM()
1743 		dcr_write(port->dcrs, DCRO_PEGPL_OMR1MSKH, 0x7fffffff);  in ppc4xx_setup_one_pciex_POM()
1746 			dcr_write(port->dcrs, DCRO_PEGPL_OMR1MSKL,  in ppc4xx_setup_one_pciex_POM()
1753 			dcr_write(port->dcrs, DCRO_PEGPL_OMR1MSKL,  in ppc4xx_setup_one_pciex_POM()
1757 			dcr_write(port->dcrs, DCRO_PEGPL_OMR1MSKL,  in ppc4xx_setup_one_pciex_POM()
1764 		dcr_write(port->dcrs, DCRO_PEGPL_OMR2BAH, lah);  in ppc4xx_setup_one_pciex_POM()
1765 		dcr_write(port->dcrs, DCRO_PEGPL_OMR2BAL, lal);  in ppc4xx_setup_one_pciex_POM()
1766 		dcr_write(port->dcrs, DCRO_PEGPL_OMR2MSKH, 0x7fffffff);  in ppc4xx_setup_one_pciex_POM()
1767 		dcr_write(port->dcrs, DCRO_PEGPL_OMR2MSKL,  in ppc4xx_setup_one_pciex_POM()
1773 		dcr_write(port->dcrs, DCRO_PEGPL_OMR3BAH, lah);  in ppc4xx_setup_one_pciex_POM()
1774 		dcr_write(port->dcrs, DCRO_PEGPL_OMR3BAL, lal);  in ppc4xx_setup_one_pciex_POM()
1775 		dcr_write(port->dcrs, DCRO_PEGPL_OMR3MSKH, 0x7fffffff);  in ppc4xx_setup_one_pciex_POM()
1777 		dcr_write(port->dcrs, DCRO_PEGPL_OMR3MSKL,  in ppc4xx_setup_one_pciex_POM()
2082 	unsigned int dcrs;  in ppc4xx_probe_pciex_bridge()  local
2150 	dcrs = dcr_resource_start(np, 0);  in ppc4xx_probe_pciex_bridge()
2151 	if (dcrs == 0) {  in ppc4xx_probe_pciex_bridge()
2155 	port->dcrs = dcr_map(np, dcrs, dcr_resource_len(np, 0));  in ppc4xx_probe_pciex_bridge()