43 	struct kvmppc_xive_vcpu *xc = vcpu->arch.xive_vcpu;  in kvmppc_xive_native_cleanup_queue()  local
44 	struct xive_q *q = &xc->queues[prio];  in kvmppc_xive_native_cleanup_queue()
46 	xive_native_disable_queue(xc->vp_id, q, prio);  in kvmppc_xive_native_cleanup_queue()
55 	struct kvmppc_xive_vcpu *xc = vcpu->arch.xive_vcpu;  in kvmppc_xive_native_cleanup_vcpu()  local
61 	if (!xc)  in kvmppc_xive_native_cleanup_vcpu()
64 	pr_devel("native_cleanup_vcpu(cpu=%d)\n", xc->server_num);  in kvmppc_xive_native_cleanup_vcpu()
67 	xc->valid = false;  in kvmppc_xive_native_cleanup_vcpu()
71 	for (i = 0; i < KVMPPC_XIVE_Q_COUNT; i++) {  in kvmppc_xive_native_cleanup_vcpu()
73 		if (xc->esc_virq[i]) {  in kvmppc_xive_native_cleanup_vcpu()
74 			if (xc->xive->single_escalation)  in kvmppc_xive_native_cleanup_vcpu()
75 				xive_cleanup_single_escalation(vcpu, xc,  in kvmppc_xive_native_cleanup_vcpu()
76 							xc->esc_virq[i]);  in kvmppc_xive_native_cleanup_vcpu()
77 			free_irq(xc->esc_virq[i], vcpu);  in kvmppc_xive_native_cleanup_vcpu()
78 			irq_dispose_mapping(xc->esc_virq[i]);  in kvmppc_xive_native_cleanup_vcpu()
79 			kfree(xc->esc_virq_names[i]);  in kvmppc_xive_native_cleanup_vcpu()
80 			xc->esc_virq[i] = 0;  in kvmppc_xive_native_cleanup_vcpu()
85 	xive_native_disable_vp(xc->vp_id);  in kvmppc_xive_native_cleanup_vcpu()
88 	vcpu->arch.xive_cam_word = 0;  in kvmppc_xive_native_cleanup_vcpu()
91 	for (i = 0; i < KVMPPC_XIVE_Q_COUNT; i++) {  in kvmppc_xive_native_cleanup_vcpu()
96 	kfree(xc);  in kvmppc_xive_native_cleanup_vcpu()
107 	struct kvmppc_xive_vcpu *xc = NULL;  in kvmppc_xive_native_connect_vcpu()  local
135 	xc = kzalloc(sizeof(*xc), GFP_KERNEL);  in kvmppc_xive_native_connect_vcpu()
136 	if (!xc) {  in kvmppc_xive_native_connect_vcpu()
141 	vcpu->arch.xive_vcpu = xc;  in kvmppc_xive_native_connect_vcpu()
142 	xc->xive = xive;  in kvmppc_xive_native_connect_vcpu()
143 	xc->vcpu = vcpu;  in kvmppc_xive_native_connect_vcpu()
144 	xc->server_num = server_num;  in kvmppc_xive_native_connect_vcpu()
146 	xc->vp_id = vp_id;  in kvmppc_xive_native_connect_vcpu()
147 	xc->valid = true;  in kvmppc_xive_native_connect_vcpu()
150 	rc = xive_native_get_vp_info(xc->vp_id, &xc->vp_cam, &xc->vp_chip_id);  in kvmppc_xive_native_connect_vcpu()
160 	rc = xive_native_enable_vp(xc->vp_id, xive->single_escalation);  in kvmppc_xive_native_connect_vcpu()
167 	vcpu->arch.xive_saved_state.w01 = cpu_to_be64(0xff000000);  in kvmppc_xive_native_connect_vcpu()
168 	vcpu->arch.xive_cam_word = cpu_to_be32(xc->vp_cam | TM_QW1W2_VO);  in kvmppc_xive_native_connect_vcpu()
195 	pr_debug("clearing esb pages for girq 0x%lx\n", irq);  in kvmppc_xive_native_reset_mapped()
202 	return 0;  in kvmppc_xive_native_reset_mapped()
267 	case 0: /* HW - forbid access */  in xive_native_tima_fault()
310 	return 0;  in kvmppc_xive_native_mmap()
323 	pr_devel("%s irq=0x%lx\n", __func__, irq);  in kvmppc_xive_native_set_source()
352 		if (state->ipi_number == 0) {  in kvmppc_xive_native_set_source()
359 		pr_debug("%s allocated hw_irq=0x%x for irq=0x%lx\n", __func__,  in kvmppc_xive_native_set_source()
372 	state->act_server = 0;  in kvmppc_xive_native_set_source()
375 	xive_native_configure_irq(state->ipi_number, 0, MASKED, 0);  in kvmppc_xive_native_set_source()
382 	rc = 0;  in kvmppc_xive_native_set_source()
398 	int rc = 0;  in kvmppc_xive_native_update_source_config()
426 		state->act_server = 0;  in kvmppc_xive_native_update_source_config()
427 		state->eisn = 0;  in kvmppc_xive_native_update_source_config()
429 		rc = xive_native_configure_irq(hw_num, 0, MASKED, 0);  in kvmppc_xive_native_update_source_config()
462 	pr_devel("%s irq=0x%lx cfg=%016llx\n", __func__, irq, kvm_cfg);  in kvmppc_xive_native_set_source_config()
491 	int rc = 0;  in kvmppc_xive_native_sync_source()
493 	pr_devel("%s irq=0x%lx", __func__, irq);  in kvmppc_xive_native_sync_source()
508 		rc = 0;  in kvmppc_xive_native_sync_source()
522 	case 0: /* EQ reset */  in xive_native_validate_queue_size()
524 		return 0;  in xive_native_validate_queue_size()
538 	struct kvmppc_xive_vcpu *xc;  in kvmppc_xive_native_set_queue_config()  local
544 	__be32 *qaddr = 0;  in kvmppc_xive_native_set_queue_config()
567 	xc = vcpu->arch.xive_vcpu;  in kvmppc_xive_native_set_queue_config()
574 	q = &xc->queues[priority];  in kvmppc_xive_native_set_queue_config()
582 		q->guest_qaddr  = 0;  in kvmppc_xive_native_set_queue_config()
583 		q->guest_qshift = 0;  in kvmppc_xive_native_set_queue_config()
585 		rc = xive_native_configure_queue(xc->vp_id, q, priority,  in kvmppc_xive_native_set_queue_config()
586 						 NULL, 0, true);  in kvmppc_xive_native_set_queue_config()
589 			       priority, xc->server_num, rc);  in kvmppc_xive_native_set_queue_config()
598 		return 0;  in kvmppc_xive_native_set_queue_config()
656 	rc = xive_native_configure_queue(xc->vp_id, q, priority,  in kvmppc_xive_native_set_queue_config()
660 		       priority, xc->server_num, rc);  in kvmppc_xive_native_set_queue_config()
669 	if (kvm_eq.qtoggle != 1 || kvm_eq.qindex != 0) {  in kvmppc_xive_native_set_queue_config()
670 		rc = xive_native_set_queue_state(xc->vp_id, priority,  in kvmppc_xive_native_set_queue_config()
690 	struct kvmppc_xive_vcpu *xc;  in kvmppc_xive_native_get_queue_config()  local
716 	xc = vcpu->arch.xive_vcpu;  in kvmppc_xive_native_get_queue_config()
723 	q = &xc->queues[priority];  in kvmppc_xive_native_get_queue_config()
725 	memset(&kvm_eq, 0, sizeof(kvm_eq));  in kvmppc_xive_native_get_queue_config()
728 		return 0;  in kvmppc_xive_native_get_queue_config()
730 	rc = xive_native_get_queue_info(xc->vp_id, priority, &qaddr, &qshift,  in kvmppc_xive_native_get_queue_config()
735 	kvm_eq.flags = 0;  in kvmppc_xive_native_get_queue_config()
742 	rc = xive_native_get_queue_state(xc->vp_id, priority, &kvm_eq.qtoggle,  in kvmppc_xive_native_get_queue_config()
754 	return 0;  in kvmppc_xive_native_get_queue_config()
761 	for (i = 0; i < KVMPPC_XICS_IRQ_PER_ICS; i++) {  in kvmppc_xive_reset_sources()
770 		state->eisn = 0;  in kvmppc_xive_reset_sources()
771 		state->act_server = 0;  in kvmppc_xive_reset_sources()
774 		xive_native_configure_irq(state->ipi_number, 0, MASKED, 0);  in kvmppc_xive_reset_sources()
778 						  0, MASKED, 0);  in kvmppc_xive_reset_sources()
794 		struct kvmppc_xive_vcpu *xc = vcpu->arch.xive_vcpu;  in kvmppc_xive_reset()  local
797 		if (!xc)  in kvmppc_xive_reset()
802 		for (prio = 0; prio < KVMPPC_XIVE_Q_COUNT; prio++) {  in kvmppc_xive_reset()
808 			if (xc->esc_virq[prio]) {  in kvmppc_xive_reset()
809 				free_irq(xc->esc_virq[prio], vcpu);  in kvmppc_xive_reset()
810 				irq_dispose_mapping(xc->esc_virq[prio]);  in kvmppc_xive_reset()
811 				kfree(xc->esc_virq_names[prio]);  in kvmppc_xive_reset()
812 				xc->esc_virq[prio] = 0;  in kvmppc_xive_reset()
819 	for (i = 0; i <= xive->max_sbid; i++) {  in kvmppc_xive_reset()
831 	return 0;  in kvmppc_xive_reset()
838 	for (j = 0; j < KVMPPC_XICS_IRQ_PER_ICS; j++) {  in kvmppc_xive_native_sync_sources()
871 	struct kvmppc_xive_vcpu *xc = vcpu->arch.xive_vcpu;  in kvmppc_xive_native_vcpu_eq_sync()  local
875 	if (!xc)  in kvmppc_xive_native_vcpu_eq_sync()
878 	for (prio = 0; prio < KVMPPC_XIVE_Q_COUNT; prio++) {  in kvmppc_xive_native_vcpu_eq_sync()
879 		struct xive_q *q = &xc->queues[prio];  in kvmppc_xive_native_vcpu_eq_sync()
889 	return 0;  in kvmppc_xive_native_vcpu_eq_sync()
901 	for (i = 0; i <= xive->max_sbid; i++) {  in kvmppc_xive_native_eq_sync()
916 	return 0;  in kvmppc_xive_native_eq_sync()
970 			return 0;  in kvmppc_xive_native_has_attr()
978 			return 0;  in kvmppc_xive_native_has_attr()
981 		return 0;  in kvmppc_xive_native_has_attr()
1043 	for (i = 0; i <= xive->max_sbid; i++) {  in kvmppc_xive_native_release()
1070 	int ret = 0;  in kvmppc_xive_native_create()
1105 	return 0;  in kvmppc_xive_native_create()
1112 #define TM_IPB_MASK  (((u64) 0xFF) << TM_IPB_SHIFT)
1116 	struct kvmppc_xive_vcpu *xc = vcpu->arch.xive_vcpu;  in kvmppc_xive_native_get_vp()  local
1123 	if (!xc)  in kvmppc_xive_native_get_vp()
1127 	val->xive_timaval[0] = vcpu->arch.xive_saved_state.w01;  in kvmppc_xive_native_get_vp()
1130 	rc = xive_native_get_vp_state(xc->vp_id, &opal_state);  in kvmppc_xive_native_get_vp()
1138 	val->xive_timaval[0] |= cpu_to_be64(opal_state & TM_IPB_MASK);  in kvmppc_xive_native_get_vp()
1149 	return 0;  in kvmppc_xive_native_get_vp()
1154 	struct kvmppc_xive_vcpu *xc = vcpu->arch.xive_vcpu;  in kvmppc_xive_native_set_vp()  local
1158 		 val->xive_timaval[0], val->xive_timaval[1]);  in kvmppc_xive_native_set_vp()
1163 	if (!xc || !xive)  in kvmppc_xive_native_set_vp()
1174 	vcpu->arch.xive_saved_state.w01 = val->xive_timaval[0];  in kvmppc_xive_native_set_vp()
1181 	return 0;  in kvmppc_xive_native_set_vp()
1197 		return 0;  in xive_native_debug_show()
1202 		struct kvmppc_xive_vcpu *xc = vcpu->arch.xive_vcpu;  in xive_native_debug_show()  local
1204 		if (!xc)  in xive_native_debug_show()
1208 			   xc->server_num,  in xive_native_debug_show()
1219 	return 0;  in xive_native_debug_show()