Lines Matching refs:pdn
332 struct pci_dn *pdn = eeh_dev_to_pdn(edev); in eeh_pe_get_parent() local
340 pdn = pci_get_pdn(edev->physfn); in eeh_pe_get_parent()
342 pdn = pdn ? pdn->parent : NULL; in eeh_pe_get_parent()
343 while (pdn) { in eeh_pe_get_parent()
345 parent = pdn_to_eeh_dev(pdn); in eeh_pe_get_parent()
352 pdn = pdn->parent; in eeh_pe_get_parent()
370 struct pci_dn *pdn = eeh_dev_to_pdn(edev); in eeh_add_to_parent_pe() local
371 int config_addr = (pdn->busno << 8) | (pdn->devfn); in eeh_add_to_parent_pe()
385 pe = eeh_pe_get(pdn->phb, edev->pe_config_addr, config_addr); in eeh_add_to_parent_pe()
419 pe = eeh_pe_alloc(pdn->phb, EEH_PE_VF); in eeh_add_to_parent_pe()
421 pe = eeh_pe_alloc(pdn->phb, EEH_PE_DEVICE); in eeh_add_to_parent_pe()
437 parent = eeh_phb_pe_get(pdn->phb); in eeh_add_to_parent_pe()
440 __func__, pdn->phb->global_number); in eeh_add_to_parent_pe()
701 struct pci_dn *pdn = eeh_dev_to_pdn(edev); in eeh_bridge_check_link() local
717 eeh_ops->read_config(pdn, cap + PCI_EXP_SLTSTA, 2, &val); in eeh_bridge_check_link()
724 eeh_ops->read_config(pdn, cap + PCI_EXP_SLTCAP, 2, &val); in eeh_bridge_check_link()
726 eeh_ops->read_config(pdn, cap + PCI_EXP_SLTCTL, 2, &val); in eeh_bridge_check_link()
731 eeh_ops->write_config(pdn, cap + PCI_EXP_SLTCTL, 2, val); in eeh_bridge_check_link()
737 eeh_ops->read_config(pdn, cap + PCI_EXP_LNKCTL, 2, &val); in eeh_bridge_check_link()
739 eeh_ops->write_config(pdn, cap + PCI_EXP_LNKCTL, 2, val); in eeh_bridge_check_link()
742 eeh_ops->read_config(pdn, cap + PCI_EXP_LNKCAP, 4, &val); in eeh_bridge_check_link()
755 eeh_ops->read_config(pdn, cap + PCI_EXP_LNKSTA, 2, &val); in eeh_bridge_check_link()
772 struct pci_dn *pdn = eeh_dev_to_pdn(edev); in eeh_restore_bridge_bars() local
780 eeh_ops->write_config(pdn, i*4, 4, edev->config_space[i]); in eeh_restore_bridge_bars()
782 eeh_ops->write_config(pdn, 14*4, 4, edev->config_space[14]); in eeh_restore_bridge_bars()
785 eeh_ops->write_config(pdn, PCI_CACHE_LINE_SIZE, 1, in eeh_restore_bridge_bars()
787 eeh_ops->write_config(pdn, PCI_LATENCY_TIMER, 1, in eeh_restore_bridge_bars()
790 eeh_ops->write_config(pdn, 15*4, 4, edev->config_space[15]); in eeh_restore_bridge_bars()
793 eeh_ops->write_config(pdn, PCI_COMMAND, 4, edev->config_space[1] | in eeh_restore_bridge_bars()
802 struct pci_dn *pdn = eeh_dev_to_pdn(edev); in eeh_restore_device_bars() local
807 eeh_ops->write_config(pdn, i*4, 4, edev->config_space[i]); in eeh_restore_device_bars()
809 eeh_ops->write_config(pdn, 12*4, 4, edev->config_space[12]); in eeh_restore_device_bars()
811 eeh_ops->write_config(pdn, PCI_CACHE_LINE_SIZE, 1, in eeh_restore_device_bars()
813 eeh_ops->write_config(pdn, PCI_LATENCY_TIMER, 1, in eeh_restore_device_bars()
817 eeh_ops->write_config(pdn, 15*4, 4, edev->config_space[15]); in eeh_restore_device_bars()
823 eeh_ops->read_config(pdn, PCI_COMMAND, 4, &cmd); in eeh_restore_device_bars()
832 eeh_ops->write_config(pdn, PCI_COMMAND, 4, cmd); in eeh_restore_device_bars()
846 struct pci_dn *pdn = eeh_dev_to_pdn(edev); in eeh_restore_one_device_bars() local
854 if (eeh_ops->restore_config && pdn) in eeh_restore_one_device_bars()
855 eeh_ops->restore_config(pdn); in eeh_restore_one_device_bars()