Lines Matching +full:ethernet +full:- +full:phy

4  * Copyright 2014 - 2015 Freescale Semiconductor Inc.
35 /include/ "t4240si-pre.dtsi"
40 	#address-cells = <2>;
41 	#size-cells = <2>;
42 	interrupt-parent = <&mpic>;
62 			#address-cells = <1>;
63 			#size-cells = <1>;
64 			compatible = "cfi-flash";
67 			bank-width = <2>;
68 			device-width = <1>;
72 			#address-cells = <1>;
73 			#size-cells = <1>;
74 			compatible = "fsl,ifc-nand";
83 	reserved-memory {
84 		#address-cells = <2>;
85 		#size-cells = <2>;
88 		bman_fbpr: bman-fbpr {
92 		qman_fqd: qman-fqd {
96 		qman_pfdr: qman-pfdr {
106 	bportals: bman-portals@ff4000000 {
110 	qportals: qman-portals@ff6000000 {
119 				#address-cells = <1>;
120 				#size-cells = <1>;
121 				compatible = "sst,sst25wf040", "jedec,spi-nor";
123 				spi-max-frequency = <40000000>; /* input clock */
152 			voltage-ranges = <1800 1800 3300 3300>;
156 			ethernet@e0000 {
157 				phy-handle = <&sgmiiphy21>;
158 				phy-connection-type = "sgmii";
161 			ethernet@e2000 {
162 				phy-handle = <&sgmiiphy22>;
163 				phy-connection-type = "sgmii";
166 			ethernet@e4000 {
167 				phy-handle = <&sgmiiphy23>;
168 				phy-connection-type = "sgmii";
171 			ethernet@e6000 {
172 				phy-handle = <&sgmiiphy24>;
173 				phy-connection-type = "sgmii";
176 			ethernet@e8000 {
180 			ethernet@ea000 {
184 			ethernet@f0000 {
185 				phy-handle = <&xfiphy1>;
186 				phy-connection-type = "xgmii";
189 			ethernet@f2000 {
190 				phy-handle = <&xfiphy2>;
191 				phy-connection-type = "xgmii";
196 			ethernet@e0000 {
197 				phy-handle = <&sgmiiphy41>;
198 				phy-connection-type = "sgmii";
201 			ethernet@e2000 {
202 				phy-handle = <&sgmiiphy42>;
203 				phy-connection-type = "sgmii";
206 			ethernet@e4000 {
207 				phy-handle = <&sgmiiphy43>;
208 				phy-connection-type = "sgmii";
211 			ethernet@e6000 {
212 				phy-handle = <&sgmiiphy44>;
213 				phy-connection-type = "sgmii";
216 			ethernet@e8000 {
220 			ethernet@ea000 {
224 			ethernet@f0000 {
225 				phy-handle = <&xfiphy3>;
226 				phy-connection-type = "xgmii";
229 			ethernet@f2000 {
230 				phy-handle = <&xfiphy4>;
231 				phy-connection-type = "xgmii";
235 				sgmiiphy21: ethernet-phy@0 {
239 				sgmiiphy22: ethernet-phy@1 {
243 				sgmiiphy23: ethernet-phy@2 {
247 				sgmiiphy24: ethernet-phy@3 {
251 				sgmiiphy41: ethernet-phy@4 {
255 				sgmiiphy42: ethernet-phy@5 {
259 				sgmiiphy43: ethernet-phy@6 {
263 				sgmiiphy44: ethernet-phy@7 {
269 				xfiphy1: ethernet-phy@10 {
270 					compatible = "ethernet-phy-id13e5.1002";
274 				xfiphy2: ethernet-phy@11 {
275 					compatible = "ethernet-phy-id13e5.1002";
279 				xfiphy3: ethernet-phy@13 {
280 					compatible = "ethernet-phy-id13e5.1002";
284 				xfiphy4: ethernet-phy@12 {
285 					compatible = "ethernet-phy-id13e5.1002";
364 /include/ "t4240si-post.dtsi"