109 static void bcm63xx_int_cfg_writel(u32 val, u32 reg)  in bcm63xx_int_cfg_writel()  argument
116 	bcm_mpi_writel(val, MPI_PCICFGDATA_REG);  in bcm63xx_int_cfg_writel()
123 	u32 val;  in bcm63xx_reset_pcie()  local
132 	val = bcm_misc_readl(reg);  in bcm63xx_reset_pcie()
133 	val |= SERDES_PCIE_EN | SERDES_PCIE_EXD_EN;  in bcm63xx_reset_pcie()
134 	bcm_misc_writel(val, reg);  in bcm63xx_reset_pcie()
152 	u32 val;  in bcm63xx_register_pcie()  local
164 	val = bcm_pcie_readl(PCIE_BRIDGE_OPT1_REG);  in bcm63xx_register_pcie()
165 	val |= OPT1_RD_BE_OPT_EN;  in bcm63xx_register_pcie()
166 	val |= OPT1_RD_REPLY_BE_FIX_EN;  in bcm63xx_register_pcie()
167 	val |= OPT1_PCIE_BRIDGE_HOLE_DET_EN;  in bcm63xx_register_pcie()
168 	val |= OPT1_L1_INT_STATUS_MASK_POL;  in bcm63xx_register_pcie()
169 	bcm_pcie_writel(val, PCIE_BRIDGE_OPT1_REG);  in bcm63xx_register_pcie()
172 	val = bcm_pcie_readl(PCIE_BRIDGE_RC_INT_MASK_REG);  in bcm63xx_register_pcie()
173 	val |= PCIE_RC_INT_A | PCIE_RC_INT_B | PCIE_RC_INT_C | PCIE_RC_INT_D;  in bcm63xx_register_pcie()
174 	bcm_pcie_writel(val, PCIE_BRIDGE_RC_INT_MASK_REG);  in bcm63xx_register_pcie()
176 	val = bcm_pcie_readl(PCIE_BRIDGE_OPT2_REG);  in bcm63xx_register_pcie()
178 	val |= OPT2_TX_CREDIT_CHK_EN;  in bcm63xx_register_pcie()
179 	val |= OPT2_UBUS_UR_DECODE_DIS;  in bcm63xx_register_pcie()
182 	val |= (PCIE_BUS_DEVICE << OPT2_CFG_TYPE1_BUS_NO_SHIFT);  in bcm63xx_register_pcie()
183 	val |= OPT2_CFG_TYPE1_BD_SEL;  in bcm63xx_register_pcie()
184 	bcm_pcie_writel(val, PCIE_BRIDGE_OPT2_REG);  in bcm63xx_register_pcie()
187 	val = bcm_pcie_readl(PCIE_IDVAL3_REG);  in bcm63xx_register_pcie()
188 	val &= ~IDVAL3_CLASS_CODE_MASK;  in bcm63xx_register_pcie()
189 	val |= (PCI_CLASS_BRIDGE_PCI << IDVAL3_SUBCLASS_SHIFT);  in bcm63xx_register_pcie()
190 	bcm_pcie_writel(val, PCIE_IDVAL3_REG);  in bcm63xx_register_pcie()
193 	val = bcm_pcie_readl(PCIE_CONFIG2_REG);  in bcm63xx_register_pcie()
194 	val &= ~CONFIG2_BAR1_SIZE_MASK;  in bcm63xx_register_pcie()
195 	bcm_pcie_writel(val, PCIE_CONFIG2_REG);  in bcm63xx_register_pcie()
198 	val = (BCM_PCIE_MEM_BASE_PA >> 20) << BASEMASK_BASE_SHIFT;  in bcm63xx_register_pcie()
199 	val |= (BCM_PCIE_MEM_BASE_PA >> 20) << BASEMASK_MASK_SHIFT;  in bcm63xx_register_pcie()
200 	val |= BASEMASK_REMAP_EN;  in bcm63xx_register_pcie()
201 	bcm_pcie_writel(val, PCIE_BRIDGE_BAR0_BASEMASK_REG);  in bcm63xx_register_pcie()
203 	val = (BCM_PCIE_MEM_BASE_PA >> 20) << REBASE_ADDR_BASE_SHIFT;  in bcm63xx_register_pcie()
204 	bcm_pcie_writel(val, PCIE_BRIDGE_BAR0_REBASE_ADDR_REG);  in bcm63xx_register_pcie()
214 	u32 val;  in bcm63xx_register_pci()  local
229 	val = BCM_PCI_MEM_BASE_PA & MPI_L2P_BASE_MASK;  in bcm63xx_register_pci()
230 	bcm_mpi_writel(val, MPI_L2PMEMBASE1_REG);  in bcm63xx_register_pci()
232 	bcm_mpi_writel(val | MPI_L2PREMAP_ENABLED_MASK, MPI_L2PMEMREMAP1_REG);  in bcm63xx_register_pci()
236 	val = bcm_pcmcia_readl(PCMCIA_C1_REG);  in bcm63xx_register_pci()
237 	val &= ~PCMCIA_C1_CBIDSEL_MASK;  in bcm63xx_register_pci()
238 	val |= (CARDBUS_PCI_IDSEL << PCMCIA_C1_CBIDSEL_SHIFT);  in bcm63xx_register_pci()
239 	bcm_pcmcia_writel(val, PCMCIA_C1_REG);  in bcm63xx_register_pci()
243 	val = BCM_CB_MEM_BASE_PA & MPI_L2P_BASE_MASK;  in bcm63xx_register_pci()
244 	bcm_mpi_writel(val, MPI_L2PMEMBASE2_REG);  in bcm63xx_register_pci()
246 	val |= MPI_L2PREMAP_ENABLED_MASK | MPI_L2PREMAP_IS_CARDBUS_MASK;  in bcm63xx_register_pci()
247 	bcm_mpi_writel(val, MPI_L2PMEMREMAP2_REG);  in bcm63xx_register_pci()
258 	val = BCM_PCI_IO_BASE_PA & MPI_L2P_BASE_MASK;  in bcm63xx_register_pci()
259 	bcm_mpi_writel(val, MPI_L2PIOBASE_REG);  in bcm63xx_register_pci()
261 	bcm_mpi_writel(val | MPI_L2PREMAP_ENABLED_MASK, MPI_L2PIOREMAP_REG);  in bcm63xx_register_pci()
270 		val = MPI_SP0_REMAP_ENABLE_MASK;  in bcm63xx_register_pci()
272 		val = 0;  in bcm63xx_register_pci()
273 	bcm_mpi_writel(val, MPI_SP0_REMAP_REG);  in bcm63xx_register_pci()
296 	val = bcm63xx_int_cfg_readl(BCMPCI_REG_TIMERS);  in bcm63xx_register_pci()
297 	val &= ~REG_TIMER_RETRY_MASK;  in bcm63xx_register_pci()
298 	bcm63xx_int_cfg_writel(val, BCMPCI_REG_TIMERS);  in bcm63xx_register_pci()
301 	val = bcm63xx_int_cfg_readl(PCI_COMMAND);  in bcm63xx_register_pci()
302 	val |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);  in bcm63xx_register_pci()
303 	bcm63xx_int_cfg_writel(val, PCI_COMMAND);  in bcm63xx_register_pci()
307 	val = bcm_mpi_readl(MPI_PCIMODESEL_REG);  in bcm63xx_register_pci()
308 	val &= ~MPI_PCIMODESEL_BAR1_NOSWAP_MASK;  in bcm63xx_register_pci()
309 	val &= ~MPI_PCIMODESEL_BAR2_NOSWAP_MASK;  in bcm63xx_register_pci()
310 	val &= ~MPI_PCIMODESEL_PREFETCH_MASK;  in bcm63xx_register_pci()
311 	val |= (8 << MPI_PCIMODESEL_PREFETCH_SHIFT);  in bcm63xx_register_pci()
312 	bcm_mpi_writel(val, MPI_PCIMODESEL_REG);  in bcm63xx_register_pci()
315 	val = bcm_mpi_readl(MPI_LOCINT_REG);  in bcm63xx_register_pci()
316 	val |= MPI_LOCINT_MASK(MPI_LOCINT_EXT_PCI_INT);  in bcm63xx_register_pci()
317 	bcm_mpi_writel(val, MPI_LOCINT_REG);  in bcm63xx_register_pci()