63 static inline int nlm_link_msiirq(int link, int msivec)  in nlm_link_msiirq()  argument
65 	return NLM_MSI_VEC_BASE + link * XLP_MSIVEC_PER_LINK + msivec;  in nlm_link_msiirq()
68 /* get the link MSI vector from irq number */
74 /* get the link from the irq number */
86  * and use 8 MSI-X vectors per link - this keeps the allocation and
88  * On XLP 9xx, there are 32 vectors per link, and the interrupts are
91 static inline int nlm_link_msixirq(int link, int bit)  in nlm_link_msixirq()  argument
93 	return NLM_MSIX_VEC_BASE + link * XLP_MSIXVEC_PER_LINK + bit;  in nlm_link_msixirq()
96 /* get the link MSI vector from irq number */
102 /* get the link from MSIX vec */
109  * Per link MSI and MSI-X information, set as IRQ handler data for
124  * On XLP, there is a PIC interrupt associated with each PCIe link on the
126  * per link and 128 overall.
128  * When a device connected to the link raises a MSI interrupt, we get a
129  * link interrupt and we then have to look at PCIE_MSI_STATUS register at
169 	int link, vec;  in xlp_msi_mask_ack()  local
171 	link = nlm_irq_msilink(d->irq);  in xlp_msi_mask_ack()
197  * We divide the MSI-X vectors to 8 per link and do a per-link allocation
200  * 32 MSI-X vectors are available per link, and the interrupts are not routed
208 	int link, msixvec;  in xlp_msix_mask_ack()  local
212 	link = nlm_irq_msixlink(msixvec);  in xlp_msix_mask_ack()
218 		status_reg = PCIE_9XX_MSIX_STATUSX(link);  in xlp_msix_mask_ack()
244  * Setup a PCIe link for MSI.  By default, the links are in
291  * Allocate a MSI vector on a link
293 static int xlp_setup_msi(uint64_t lnkbase, int node, int link,  in xlp_setup_msi()  argument
302 	/* Get MSI data for the link */  in xlp_setup_msi()
303 	lirq = PIC_PCIE_LINK_MSI_IRQ(link);  in xlp_setup_msi()
304 	xirq = nlm_irq_to_xirq(node, nlm_link_msiirq(link, 0));  in xlp_setup_msi()
306 	msiaddr = MSI_LINK_ADDR(node, link);  in xlp_setup_msi()
311 		/* switch the link IRQ to MSI range */  in xlp_setup_msi()
313 			irt = PIC_9XX_IRT_PCIE_LINK_INDEX(link);  in xlp_setup_msi()
315 			irt = PIC_IRT_PCIE_LINK_INDEX(link);  in xlp_setup_msi()
344  * Switch a link to MSI-X mode
400 static int xlp_setup_msix(uint64_t lnkbase, int node, int link,  in xlp_setup_msix()  argument
409 	/* Get MSI data for the link */  in xlp_setup_msix()
410 	lirq = PIC_PCIE_MSIX_IRQ(link);  in xlp_setup_msix()
411 	xirq = nlm_irq_to_xirq(node, nlm_link_msixirq(link, 0));  in xlp_setup_msix()
413 	msixaddr = MSIX_LINK_ADDR(node, link);  in xlp_setup_msix()
416 	/* switch the PCIe link to MSI-X mode at the first alloc */  in xlp_setup_msix()
448 	int node, link, slot;  in arch_setup_msi_irq()  local
456 	link = PCI_FUNC(lnkdev->devfn);  in arch_setup_msi_irq()
458 	lnkbase = nlm_get_pcie_base(node, link);  in arch_setup_msi_irq()
461 		return xlp_setup_msix(lnkbase, node, link, desc);  in arch_setup_msi_irq()
463 		return xlp_setup_msi(lnkbase, node, link, desc);  in arch_setup_msi_irq()
466 void __init xlp_init_node_msi_irqs(int node, int link)  in xlp_init_node_msi_irqs()  argument
472 	pr_info("[%d %d] Init node PCI IRT\n", node, link);  in xlp_init_node_msi_irqs()
475 	/* Alloc an MSI block for the link */  in xlp_init_node_msi_irqs()
482 	md->lnkbase = nlm_get_pcie_base(node, link);  in xlp_init_node_msi_irqs()
485 	irq = nlm_irq_to_xirq(node, nlm_link_msiirq(link, 0));  in xlp_init_node_msi_irqs()
494 				PIC_PCIE_MSIX_IRQ(link) << 1 | 0 << 0);  in xlp_init_node_msi_irqs()
496 					(link * XLP_MSIXVEC_PER_LINK)), val);  in xlp_init_node_msi_irqs()
499 			 * per link  in xlp_init_node_msi_irqs()
501 			msixvec = link * XLP_MSIXVEC_PER_LINK + i;  in xlp_init_node_msi_irqs()
504 					PIC_PCIE_MSIX_IRQ(link),  in xlp_init_node_msi_irqs()
508 		/* Initialize MSI-X extended irq space for the link  */  in xlp_init_node_msi_irqs()
509 		irq = nlm_irq_to_xirq(node, nlm_link_msixirq(link, i));  in xlp_init_node_msi_irqs()
518 	int link, i, irqbase;  in nlm_dispatch_msi()  local
521 	link = lirq - PIC_PCIE_LINK_MSI_IRQ_BASE;  in nlm_dispatch_msi()
522 	irqbase = nlm_irq_to_xirq(node, nlm_link_msiirq(link, 0));  in nlm_dispatch_msi()
537 	ack_c0_eirr(PIC_PCIE_LINK_MSI_IRQ(link));  in nlm_dispatch_msi()
540 				PIC_9XX_IRT_PCIE_LINK_INDEX(link));  in nlm_dispatch_msi()
542 		nlm_pic_ack(md->node->picbase, PIC_IRT_PCIE_LINK_INDEX(link));  in nlm_dispatch_msi()
548 	int link, i, irqbase;  in nlm_dispatch_msix()  local
551 	link = lirq - PIC_PCIE_MSIX_IRQ_BASE;  in nlm_dispatch_msix()
552 	irqbase = nlm_irq_to_xirq(node, nlm_link_msixirq(link, 0));  in nlm_dispatch_msix()
555 		status = nlm_read_reg(md->lnkbase, PCIE_9XX_MSIX_STATUSX(link));  in nlm_dispatch_msix()
559 	/* narrow it down to the MSI-x vectors for our link */  in nlm_dispatch_msix()
561 		status = (status >> (link * XLP_MSIXVEC_PER_LINK)) &  in nlm_dispatch_msix()
570 	ack_c0_eirr(PIC_PCIE_MSIX_IRQ(link));  in nlm_dispatch_msix()