26 #define MIPS_R_ZERO	0  macro
233 		return MIPS_R_ZERO;  in ebpf_to_mips_reg()
305 	emit_instr(ctx, addiu, MIPS_R_V1, MIPS_R_ZERO, MAX_TAIL_CALL_CNT);  in gen_int_prologue()
347 					MIPS_R_S4, MIPS_R_V1, MIPS_R_ZERO);  in gen_int_prologue()
412 		emit_instr(ctx, addiu, reg, MIPS_R_ZERO, insn->imm);  in gen_imm_to_reg()
465 		emit_instr(ctx, dinsu, dst, MIPS_R_ZERO, 32, 32);  in gen_imm_insn()
477 			emit_instr(ctx, daddiu, dst, MIPS_R_ZERO, insn->imm);  in gen_imm_insn()
516 			emit_instr(ctx, addiu, dst, MIPS_R_ZERO, insn->imm);  in gen_imm_insn()
570 		emit_instr(ctx, daddiu, dst, MIPS_R_ZERO, (int)value);  in emit_const_to_reg()
593 						   seen_part ? dst : MIPS_R_ZERO,  in emit_const_to_reg()
617 	emit_instr(ctx, bne, MIPS_R_AT, MIPS_R_ZERO, b_off);  in emit_bpf_tail_call()
638 	emit_instr(ctx, beq, MIPS_R_AT, MIPS_R_ZERO, b_off);  in emit_bpf_tail_call()
646 	emit_instr(ctx, daddu, MIPS_R_V1, MIPS_R_T5, MIPS_R_ZERO);  in emit_bpf_tail_call()
700 			emit_instr(ctx, dinsu, dst, MIPS_R_ZERO, 32, 32);  in build_one_insn()
716 			emit_instr(ctx, dinsu, dst, MIPS_R_ZERO, 32, 32);  in build_one_insn()
717 		emit_instr(ctx, dsubu, dst, MIPS_R_ZERO, dst);  in build_one_insn()
747 		emit_instr(ctx, subu, dst, MIPS_R_ZERO, dst);  in build_one_insn()
763 				emit_instr(ctx, addu, dst, MIPS_R_ZERO, MIPS_R_ZERO);  in build_one_insn()
788 			emit_instr(ctx, dinsu, dst, MIPS_R_ZERO, 32, 32);  in build_one_insn()
792 				emit_instr(ctx, addu, dst, MIPS_R_ZERO, MIPS_R_ZERO);  in build_one_insn()
826 			emit_instr(ctx, dinsu, dst, MIPS_R_ZERO, 32, 32);  in build_one_insn()
843 			emit_instr(ctx, daddu, tmp_reg, src, MIPS_R_ZERO);  in build_one_insn()
844 			emit_instr(ctx, dinsu, tmp_reg, MIPS_R_ZERO, 32, 32);  in build_one_insn()
850 				emit_instr(ctx, daddu, dst, src, MIPS_R_ZERO);  in build_one_insn()
942 				emit_instr(ctx, addu, dst, src, MIPS_R_ZERO);  in build_one_insn()
996 			emit_instr(ctx, beq, MIPS_R_ZERO, MIPS_R_ZERO, b_off);  in build_one_insn()
1007 			src = MIPS_R_ZERO;  in build_one_insn()
1041 			src = MIPS_R_ZERO;  in build_one_insn()
1068 			src = MIPS_R_ZERO;  in build_one_insn()
1081 						MIPS_R_ZERO, MIPS_R_T8);  in build_one_insn()
1086 			src = MIPS_R_ZERO;  in build_one_insn()
1091 			src = MIPS_R_ZERO;  in build_one_insn()
1216 			dst = MIPS_R_ZERO;  in build_one_insn()
1222 		dst = MIPS_R_ZERO;  in build_one_insn()
1249 		dst = MIPS_R_ZERO;  in build_one_insn()
1277 		dst = MIPS_R_ZERO;  in build_one_insn()
1328 			emit_instr(ctx, dinsu, dst, MIPS_R_ZERO, 32, 32);  in build_one_insn()
1465 				emit_instr(ctx, beq, MIPS_R_T8, MIPS_R_ZERO, -4 * 4);  in build_one_insn()
1470 					emit_instr(ctx, daddu, MIPS_R_AT, src, MIPS_R_ZERO);  in build_one_insn()
1471 					emit_instr(ctx, dinsu, MIPS_R_AT, MIPS_R_ZERO, 32, 32);  in build_one_insn()
1477 				emit_instr(ctx, beq, MIPS_R_T8, MIPS_R_ZERO, -4 * 4);  in build_one_insn()
1494 					emit_instr(ctx, daddu, MIPS_R_AT, src, MIPS_R_ZERO);  in build_one_insn()
1495 					emit_instr(ctx, dinsu, MIPS_R_AT, MIPS_R_ZERO, 32, 32);  in build_one_insn()