Lines Matching full:cache
6 * Inline assembly cache operations.
31 * for indexed cache operations. Two issues here:
47 " cache %0, %1 \n" \
107 "1: cache %1, (%2) \n" \
202 " cache %1, 0x000(%0); cache %1, 0x010(%0) \n" \
203 " cache %1, 0x020(%0); cache %1, 0x030(%0) \n" \
204 " cache %1, 0x040(%0); cache %1, 0x050(%0) \n" \
205 " cache %1, 0x060(%0); cache %1, 0x070(%0) \n" \
206 " cache %1, 0x080(%0); cache %1, 0x090(%0) \n" \
207 " cache %1, 0x0a0(%0); cache %1, 0x0b0(%0) \n" \
208 " cache %1, 0x0c0(%0); cache %1, 0x0d0(%0) \n" \
209 " cache %1, 0x0e0(%0); cache %1, 0x0f0(%0) \n" \
210 " cache %1, 0x100(%0); cache %1, 0x110(%0) \n" \
211 " cache %1, 0x120(%0); cache %1, 0x130(%0) \n" \
212 " cache %1, 0x140(%0); cache %1, 0x150(%0) \n" \
213 " cache %1, 0x160(%0); cache %1, 0x170(%0) \n" \
214 " cache %1, 0x180(%0); cache %1, 0x190(%0) \n" \
215 " cache %1, 0x1a0(%0); cache %1, 0x1b0(%0) \n" \
216 " cache %1, 0x1c0(%0); cache %1, 0x1d0(%0) \n" \
217 " cache %1, 0x1e0(%0); cache %1, 0x1f0(%0) \n" \
228 " cache %1, 0x000(%0); cache %1, 0x020(%0) \n" \
229 " cache %1, 0x040(%0); cache %1, 0x060(%0) \n" \
230 " cache %1, 0x080(%0); cache %1, 0x0a0(%0) \n" \
231 " cache %1, 0x0c0(%0); cache %1, 0x0e0(%0) \n" \
232 " cache %1, 0x100(%0); cache %1, 0x120(%0) \n" \
233 " cache %1, 0x140(%0); cache %1, 0x160(%0) \n" \
234 " cache %1, 0x180(%0); cache %1, 0x1a0(%0) \n" \
235 " cache %1, 0x1c0(%0); cache %1, 0x1e0(%0) \n" \
236 " cache %1, 0x200(%0); cache %1, 0x220(%0) \n" \
237 " cache %1, 0x240(%0); cache %1, 0x260(%0) \n" \
238 " cache %1, 0x280(%0); cache %1, 0x2a0(%0) \n" \
239 " cache %1, 0x2c0(%0); cache %1, 0x2e0(%0) \n" \
240 " cache %1, 0x300(%0); cache %1, 0x320(%0) \n" \
241 " cache %1, 0x340(%0); cache %1, 0x360(%0) \n" \
242 " cache %1, 0x380(%0); cache %1, 0x3a0(%0) \n" \
243 " cache %1, 0x3c0(%0); cache %1, 0x3e0(%0) \n" \
254 " cache %1, 0x000(%0); cache %1, 0x040(%0) \n" \
255 " cache %1, 0x080(%0); cache %1, 0x0c0(%0) \n" \
256 " cache %1, 0x100(%0); cache %1, 0x140(%0) \n" \
257 " cache %1, 0x180(%0); cache %1, 0x1c0(%0) \n" \
258 " cache %1, 0x200(%0); cache %1, 0x240(%0) \n" \
259 " cache %1, 0x280(%0); cache %1, 0x2c0(%0) \n" \
260 " cache %1, 0x300(%0); cache %1, 0x340(%0) \n" \
261 " cache %1, 0x380(%0); cache %1, 0x3c0(%0) \n" \
262 " cache %1, 0x400(%0); cache %1, 0x440(%0) \n" \
263 " cache %1, 0x480(%0); cache %1, 0x4c0(%0) \n" \
264 " cache %1, 0x500(%0); cache %1, 0x540(%0) \n" \
265 " cache %1, 0x580(%0); cache %1, 0x5c0(%0) \n" \
266 " cache %1, 0x600(%0); cache %1, 0x640(%0) \n" \
267 " cache %1, 0x680(%0); cache %1, 0x6c0(%0) \n" \
268 " cache %1, 0x700(%0); cache %1, 0x740(%0) \n" \
269 " cache %1, 0x780(%0); cache %1, 0x7c0(%0) \n" \
280 " cache %1, 0x000(%0); cache %1, 0x080(%0) \n" \
281 " cache %1, 0x100(%0); cache %1, 0x180(%0) \n" \
282 " cache %1, 0x200(%0); cache %1, 0x280(%0) \n" \
283 " cache %1, 0x300(%0); cache %1, 0x380(%0) \n" \
284 " cache %1, 0x400(%0); cache %1, 0x480(%0) \n" \
285 " cache %1, 0x500(%0); cache %1, 0x580(%0) \n" \
286 " cache %1, 0x600(%0); cache %1, 0x680(%0) \n" \
287 " cache %1, 0x700(%0); cache %1, 0x780(%0) \n" \
288 " cache %1, 0x800(%0); cache %1, 0x880(%0) \n" \
289 " cache %1, 0x900(%0); cache %1, 0x980(%0) \n" \
290 " cache %1, 0xa00(%0); cache %1, 0xa80(%0) \n" \
291 " cache %1, 0xb00(%0); cache %1, 0xb80(%0) \n" \
292 " cache %1, 0xc00(%0); cache %1, 0xc80(%0) \n" \
293 " cache %1, 0xd00(%0); cache %1, 0xd80(%0) \n" \
294 " cache %1, 0xe00(%0); cache %1, 0xe80(%0) \n" \
295 " cache %1, 0xf00(%0); cache %1, 0xf80(%0) \n" \
303 * MIPS R6 changed the cache opcode and moved to a 8-bit offset field.
305 * more cache lines
313 " cache %1, 0x000(%0); cache %1, 0x010(%0)\n" \
314 " cache %1, 0x020(%0); cache %1, 0x030(%0)\n" \
315 " cache %1, 0x040(%0); cache %1, 0x050(%0)\n" \
316 " cache %1, 0x060(%0); cache %1, 0x070(%0)\n" \
317 " cache %1, 0x080(%0); cache %1, 0x090(%0)\n" \
318 " cache %1, 0x0a0(%0); cache %1, 0x0b0(%0)\n" \
319 " cache %1, 0x0c0(%0); cache %1, 0x0d0(%0)\n" \
320 " cache %1, 0x0e0(%0); cache %1, 0x0f0(%0)\n" \
322 " cache %1, 0x000($1); cache %1, 0x010($1)\n" \
323 " cache %1, 0x020($1); cache %1, 0x030($1)\n" \
324 " cache %1, 0x040($1); cache %1, 0x050($1)\n" \
325 " cache %1, 0x060($1); cache %1, 0x070($1)\n" \
326 " cache %1, 0x080($1); cache %1, 0x090($1)\n" \
327 " cache %1, 0x0a0($1); cache %1, 0x0b0($1)\n" \
328 " cache %1, 0x0c0($1); cache %1, 0x0d0($1)\n" \
329 " cache %1, 0x0e0($1); cache %1, 0x0f0($1)\n" \
341 " cache %1, 0x000(%0); cache %1, 0x020(%0)\n" \
342 " cache %1, 0x040(%0); cache %1, 0x060(%0)\n" \
343 " cache %1, 0x080(%0); cache %1, 0x0a0(%0)\n" \
344 " cache %1, 0x0c0(%0); cache %1, 0x0e0(%0)\n" \
346 " cache %1, 0x000($1); cache %1, 0x020($1)\n" \
347 " cache %1, 0x040($1); cache %1, 0x060($1)\n" \
348 " cache %1, 0x080($1); cache %1, 0x0a0($1)\n" \
349 " cache %1, 0x0c0($1); cache %1, 0x0e0($1)\n" \
351 " cache %1, 0x000($1); cache %1, 0x020($1)\n" \
352 " cache %1, 0x040($1); cache %1, 0x060($1)\n" \
353 " cache %1, 0x080($1); cache %1, 0x0a0($1)\n" \
354 " cache %1, 0x0c0($1); cache %1, 0x0e0($1)\n" \
356 " cache %1, 0x000($1); cache %1, 0x020($1)\n" \
357 " cache %1, 0x040($1); cache %1, 0x060($1)\n" \
358 " cache %1, 0x080($1); cache %1, 0x0a0($1)\n" \
359 " cache %1, 0x0c0($1); cache %1, 0x0e0($1)\n" \
371 " cache %1, 0x000(%0); cache %1, 0x040(%0)\n" \
372 " cache %1, 0x080(%0); cache %1, 0x0c0(%0)\n" \
374 " cache %1, 0x000($1); cache %1, 0x040($1)\n" \
375 " cache %1, 0x080($1); cache %1, 0x0c0($1)\n" \
377 " cache %1, 0x000($1); cache %1, 0x040($1)\n" \
378 " cache %1, 0x080($1); cache %1, 0x0c0($1)\n" \
380 " cache %1, 0x000($1); cache %1, 0x040($1)\n" \
381 " cache %1, 0x080($1); cache %1, 0x0c0($1)\n" \
383 " cache %1, 0x000($1); cache %1, 0x040($1)\n" \
384 " cache %1, 0x080($1); cache %1, 0x0c0($1)\n" \
386 " cache %1, 0x000($1); cache %1, 0x040($1)\n" \
387 " cache %1, 0x080($1); cache %1, 0x0c0($1)\n" \
389 " cache %1, 0x000($1); cache %1, 0x040($1)\n" \
390 " cache %1, 0x080($1); cache %1, 0x0c0($1)\n" \
392 " cache %1, 0x000($1); cache %1, 0x040($1)\n" \
393 " cache %1, 0x080($1); cache %1, 0x0c0($1)\n" \
405 " cache %1, 0x000(%0); cache %1, 0x080(%0)\n" \
407 " cache %1, 0x000($1); cache %1, 0x080($1)\n" \
409 " cache %1, 0x000($1); cache %1, 0x080($1)\n" \
411 " cache %1, 0x000($1); cache %1, 0x080($1)\n" \
413 " cache %1, 0x000($1); cache %1, 0x080($1)\n" \
415 " cache %1, 0x000($1); cache %1, 0x080($1)\n" \
417 " cache %1, 0x000($1); cache %1, 0x080($1)\n" \
419 " cache %1, 0x000($1); cache %1, 0x080($1)\n" \
421 " cache %1, 0x000($1); cache %1, 0x080($1)\n" \
423 " cache %1, 0x000($1); cache %1, 0x080($1)\n" \
425 " cache %1, 0x000($1); cache %1, 0x080($1)\n" \
427 " cache %1, 0x000($1); cache %1, 0x080($1)\n" \
429 " cache %1, 0x000($1); cache %1, 0x080($1)\n" \
431 " cache %1, 0x000($1); cache %1, 0x080($1)\n" \
433 " cache %1, 0x000($1); cache %1, 0x080($1)\n" \
435 " cache %1, 0x000($1); cache %1, 0x080($1)\n" \
437 " cache %1, 0x000($1); cache %1, 0x080($1)\n" \
445 * Perform the cache operation specified by op using a user mode virtual
531 static inline void extra##blast_##pfx##cache##lsize(void) \
542 cache##lsize##_unroll32(addr|ws, indexop); \
545 static inline void extra##blast_##pfx##cache##lsize##_page(unsigned long page) \
551 cache##lsize##_unroll32(start, hitop); \
556 static inline void extra##blast_##pfx##cache##lsize##_page_indexed(unsigned long page) \
568 cache##lsize##_unroll32(addr|ws, indexop); \
593 static inline void blast_##pfx##cache##lsize##_user_page(unsigned long page) \
599 cache##lsize##_unroll32_user(start, hitop); \
616 static inline void prot##extra##blast_##pfx##cache##_range(unsigned long start, \
639 static inline void protected_blast_##pfx##cache##_range(unsigned long start,\
680 static inline void blast_##pfx##cache##lsize##_node(long node) \
691 cache##lsize##_unroll32(addr|ws, indexop); \