Lines Matching full:23
21 31 24 23 16 15 8 7
24 that bits 16-23 have been 0 for all MIPS processors before the MIPS32/64
31 * Assigned Company values for bits 23:16 of the PRId register.
62 * These are valid when 23:16 == PRID_COMP_LEGACY
99 * These are the PRID's for when 23:16 == PRID_COMP_MIPS
133 * These are the PRID's for when 23:16 == PRID_COMP_SIBYTE
140 * These are the PRID's for when 23:16 == PRID_COMP_SANDCRAFT
146 * These are the PRID's for when 23:16 == PRID_COMP_BROADCOM
162 * These are the PRID's for when 23:16 == PRID_COMP_CAVIUM
183 * These are the PRID's for when 23:16 == PRID_COMP_INGENIC_*
189 * These are the PRID's for when 23:16 == PRID_COMP_NETLOGIC
378 #define MIPS_CPU_RIXI BIT_ULL(23) /* CPU has TLB Read/eXec Inhibit */