Lines Matching refs:interrupt

30 	cpu_intc: interrupt-controller {
32 		compatible = "mti,cpu-interrupt-controller";
34 		interrupt-controller;
35 		#interrupt-cells = <1>;
59 		periph_intc: interrupt-controller@441400 {
63 			interrupt-controller;
64 			#interrupt-cells = <1>;
66 			interrupt-parent = <&cpu_intc>;
70 		sun_l2_intc: interrupt-controller@401800 {
73 			interrupt-controller;
74 			#interrupt-cells = <1>;
75 			interrupt-parent = <&periph_intc>;
83 			interrupt-parent = <&sun_l2_intc>;
92 		upg_irq0_intc: interrupt-controller@406780 {
99 			interrupt-controller;
100 			#interrupt-cells = <1>;
102 			interrupt-parent = <&periph_intc>;
104 			interrupt-names = "upg_main", "upg_bsc", "upg_spi";
123 			interrupt-parent = <&periph_intc>;
134 			interrupt-parent = <&periph_intc>;
145 			interrupt-parent = <&periph_intc>;
154 		      interrupt-parent = <&upg_irq0_intc>;
157 		      interrupt-names = "upg_bsca";
164 		      interrupt-parent = <&upg_irq0_intc>;
167 		      interrupt-names = "upg_bscb";
174 		      interrupt-parent = <&upg_irq0_intc>;
177 		      interrupt-names = "upg_bscc";
184 		      interrupt-parent = <&upg_irq0_intc>;
187 		      interrupt-names = "upg_bscd";
194 		      interrupt-parent = <&upg_irq0_intc>;
197 		      interrupt-names = "upg_bsce";
228 			#interrupt-cells = <2>;
230 			interrupt-controller;
231 			interrupt-parent = <&upg_irq0_intc>;
245 			interrupt-parent = <&periph_intc>;
266 			interrupt-parent = <&periph_intc>;
276 			interrupt-parent = <&periph_intc>;
284 			interrupt-parent = <&periph_intc>;
294 			interrupt-parent = <&periph_intc>;
299 		spi_l2_intc: interrupt-controller@411d00 {
302 			interrupt-controller;
303 			#interrupt-cells = <1>;
304 			interrupt-parent = <&periph_intc>;
317 			interrupt-parent = <&spi_l2_intc>;
318 			interrupt-names = "spi_lr_fullness_reached",
337 			interrupt-parent = <&upg_irq0_intc>;
338 			interrupt-names = "mspi_done";