12 #define spanlines(start, end) \  argument
13 	(((end - (start & ~(LINESIZE - 1))) >> LINEBITS) + 1)
15 void flush_dcache_range(unsigned long start, unsigned long end)  in flush_dcache_range()  argument
17 	unsigned long lines = spanlines(start, end-1);  in flush_dcache_range()
20 	start &= ~(LINESIZE - 1);  in flush_dcache_range()
28 		: "r" (start)  in flush_dcache_range()
30 		start += LINESIZE;  in flush_dcache_range()
35 void flush_icache_range(unsigned long start, unsigned long end)  in flush_icache_range()  argument
37 	unsigned long lines = spanlines(start, end-1);  in flush_icache_range()
40 	start &= ~(LINESIZE - 1);  in flush_icache_range()
49 			: "r" (start)  in flush_icache_range()
51 		start += LINESIZE;  in flush_icache_range()
60 void hexagon_clean_dcache_range(unsigned long start, unsigned long end)  in hexagon_clean_dcache_range()  argument
62 	unsigned long lines = spanlines(start, end-1);  in hexagon_clean_dcache_range()
65 	start &= ~(LINESIZE - 1);  in hexagon_clean_dcache_range()
73 		: "r" (start)  in hexagon_clean_dcache_range()
75 		start += LINESIZE;  in hexagon_clean_dcache_range()
80 void hexagon_inv_dcache_range(unsigned long start, unsigned long end)  in hexagon_inv_dcache_range()  argument
82 	unsigned long lines = spanlines(start, end-1);  in hexagon_inv_dcache_range()
85 	start &= ~(LINESIZE - 1);  in hexagon_inv_dcache_range()
93 		: "r" (start)  in hexagon_inv_dcache_range()
95 		start += LINESIZE;  in hexagon_inv_dcache_range()