Lines Matching full:do
28 #define flush_cache_all() do { } while (0)
29 #define flush_cache_mm(mm) do { } while (0)
30 #define flush_cache_dup_mm(mm) do { } while (0)
31 #define flush_cache_range(vma, start, end) do { } while (0)
32 #define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
34 #define flush_dcache_page(page) do { } while (0)
35 #define flush_dcache_mmap_lock(mapping) do { } while (0)
36 #define flush_dcache_mmap_unlock(mapping) do { } while (0)
37 #define flush_icache_page(vma, pg) do { } while (0)
38 #define flush_icache_user_range(vma, pg, adr, len) do { } while (0)
39 #define flush_cache_vmap(start, end) do { } while (0)
40 #define flush_cache_vunmap(start, end) do { } while (0)
69 * to happen, classically... but instead we do it like ia64 and