Lines Matching +full:0 +full:x29
13 * @rs0: register containing affinity level 0 bit shift
27 * aff0 = mpidr_masked & 0xff;
28 * aff1 = mpidr_masked & 0xff00;
29 * aff2 = mpidr_masked & 0xff0000;
30 * aff3 = mpidr_masked & 0xff00000000;
40 and \dst, \mpidr, #0xff // mask=aff0
42 and \mask, \mpidr, #0xff00 // mask = aff1
45 and \mask, \mpidr, #0xff0000 // mask = aff2
48 and \mask, \mpidr, #0xff00000000 // mask = aff3
60 * path through cpu_resume() will return 0.
65 stp x29, lr, [x0, #SLEEP_STACK_DATA_CALLEE_REGS]
92 stp x29, lr, [sp, #-16]!
94 ldp x29, lr, [sp], #16
125 add x29, x0, #SLEEP_STACK_DATA_CALLEE_REGS
140 ldp x19, x20, [x29, #16]
141 ldp x21, x22, [x29, #32]
142 ldp x23, x24, [x29, #48]
143 ldp x25, x26, [x29, #64]
144 ldp x27, x28, [x29, #80]
145 ldp x29, lr, [x29]
146 mov x0, #0