Lines Matching refs:ARM64_FTR_REG

370 #define ARM64_FTR_REG(id, table) {		\  macro
383 	ARM64_FTR_REG(SYS_ID_PFR0_EL1, ftr_id_pfr0),
384 	ARM64_FTR_REG(SYS_ID_PFR1_EL1, ftr_generic_32bits),
385 	ARM64_FTR_REG(SYS_ID_DFR0_EL1, ftr_id_dfr0),
386 	ARM64_FTR_REG(SYS_ID_MMFR0_EL1, ftr_id_mmfr0),
387 	ARM64_FTR_REG(SYS_ID_MMFR1_EL1, ftr_generic_32bits),
388 	ARM64_FTR_REG(SYS_ID_MMFR2_EL1, ftr_generic_32bits),
389 	ARM64_FTR_REG(SYS_ID_MMFR3_EL1, ftr_generic_32bits),
392 	ARM64_FTR_REG(SYS_ID_ISAR0_EL1, ftr_generic_32bits),
393 	ARM64_FTR_REG(SYS_ID_ISAR1_EL1, ftr_generic_32bits),
394 	ARM64_FTR_REG(SYS_ID_ISAR2_EL1, ftr_generic_32bits),
395 	ARM64_FTR_REG(SYS_ID_ISAR3_EL1, ftr_generic_32bits),
396 	ARM64_FTR_REG(SYS_ID_ISAR4_EL1, ftr_generic_32bits),
397 	ARM64_FTR_REG(SYS_ID_ISAR5_EL1, ftr_id_isar5),
398 	ARM64_FTR_REG(SYS_ID_MMFR4_EL1, ftr_id_mmfr4),
401 	ARM64_FTR_REG(SYS_MVFR0_EL1, ftr_generic_32bits),
402 	ARM64_FTR_REG(SYS_MVFR1_EL1, ftr_generic_32bits),
403 	ARM64_FTR_REG(SYS_MVFR2_EL1, ftr_mvfr2),
406 	ARM64_FTR_REG(SYS_ID_AA64PFR0_EL1, ftr_id_aa64pfr0),
407 	ARM64_FTR_REG(SYS_ID_AA64PFR1_EL1, ftr_id_aa64pfr1),
408 	ARM64_FTR_REG(SYS_ID_AA64ZFR0_EL1, ftr_id_aa64zfr0),
411 	ARM64_FTR_REG(SYS_ID_AA64DFR0_EL1, ftr_id_aa64dfr0),
412 	ARM64_FTR_REG(SYS_ID_AA64DFR1_EL1, ftr_raz),
415 	ARM64_FTR_REG(SYS_ID_AA64ISAR0_EL1, ftr_id_aa64isar0),
416 	ARM64_FTR_REG(SYS_ID_AA64ISAR1_EL1, ftr_id_aa64isar1),
419 	ARM64_FTR_REG(SYS_ID_AA64MMFR0_EL1, ftr_id_aa64mmfr0),
420 	ARM64_FTR_REG(SYS_ID_AA64MMFR1_EL1, ftr_id_aa64mmfr1),
421 	ARM64_FTR_REG(SYS_ID_AA64MMFR2_EL1, ftr_id_aa64mmfr2),
424 	ARM64_FTR_REG(SYS_ZCR_EL1, ftr_zcr),
428 	ARM64_FTR_REG(SYS_DCZID_EL0, ftr_dczid),
431 	ARM64_FTR_REG(SYS_CNTFRQ_EL0, ftr_single32),