Lines Matching refs:gcc
9 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
21 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
712 gcc: clock-controller@100000 { label
713 compatible = "qcom,gcc-sdm845";
740 clocks = <&gcc GCC_PRNG_AHB_CLK>;
748 clocks = <&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>,
749 <&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>;
759 clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>;
772 clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>;
785 clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>;
796 clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>;
809 clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>;
822 clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>;
833 clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>;
846 clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>;
859 clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>;
870 clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>;
883 clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>;
896 clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>;
907 clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>;
920 clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>;
933 clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>;
944 clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>;
957 clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>;
970 clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>;
981 clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>;
994 clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>;
1007 clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>;
1018 clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>;
1031 clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>;
1044 clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>;
1056 clocks = <&gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>,
1057 <&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>;
1067 clocks = <&gcc GCC_QUPV3_WRAP1_S0_CLK>;
1080 clocks = <&gcc GCC_QUPV3_WRAP1_S0_CLK>;
1093 clocks = <&gcc GCC_QUPV3_WRAP1_S0_CLK>;
1104 clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>;
1117 clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>;
1130 clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>;
1141 clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>;
1154 clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>;
1167 clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>;
1178 clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>;
1191 clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>;
1204 clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>;
1215 clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>;
1228 clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>;
1241 clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>;
1252 clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>;
1265 clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>;
1278 clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>;
1289 clocks = <&gcc GCC_QUPV3_WRAP1_S6_CLK>;
1302 clocks = <&gcc GCC_QUPV3_WRAP1_S6_CLK>;
1315 clocks = <&gcc GCC_QUPV3_WRAP1_S6_CLK>;
1326 clocks = <&gcc GCC_QUPV3_WRAP1_S7_CLK>;
1339 clocks = <&gcc GCC_QUPV3_WRAP1_S7_CLK>;
1352 clocks = <&gcc GCC_QUPV3_WRAP1_S7_CLK>;
1375 power-domains = <&gcc UFS_PHY_GDSC>;
1390 <&gcc GCC_UFS_PHY_AXI_CLK>,
1391 <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
1392 <&gcc GCC_UFS_PHY_AHB_CLK>,
1393 <&gcc GCC_UFS_PHY_UNIPRO_CORE_CLK>,
1395 <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>,
1396 <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>,
1397 <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>;
1419 clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>,
1420 <&gcc GCC_UFS_PHY_PHY_AUX_CLK>;
1855 clocks = <&gcc GCC_MSS_CFG_AHB_CLK>,
1856 <&gcc GCC_MSS_Q6_MEMNOC_AXI_CLK>,
1857 <&gcc GCC_BOOT_ROM_AHB_CLK>,
1858 <&gcc GCC_MSS_GPLL0_DIV_CLK_SRC>,
1859 <&gcc GCC_MSS_SNOC_AXI_CLK>,
1860 <&gcc GCC_MSS_MFAB_AXIS_CLK>,
1861 <&gcc GCC_PRNG_AHB_CLK>,
2366 clocks = <&gcc GCC_SDCC2_AHB_CLK>,
2367 <&gcc GCC_SDCC2_APPS_CLK>;
2380 clocks = <&gcc GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
2381 <&gcc GCC_QSPI_CORE_CLK>;
2392 clocks = <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
2396 resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;
2407 clocks = <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
2411 resets = <&gcc GCC_QUSB2PHY_SEC_BCR>;
2427 clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>,
2428 <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
2429 <&gcc GCC_USB3_PRIM_CLKREF_CLK>,
2430 <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>;
2433 resets = <&gcc GCC_USB3_DP_PHY_PRIM_BCR>,
2434 <&gcc GCC_USB3_PHY_PRIM_BCR>;
2445 clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
2460 clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK>,
2461 <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
2462 <&gcc GCC_USB3_SEC_CLKREF_CLK>,
2463 <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>;
2466 resets = <&gcc GCC_USB3PHY_PHY_SEC_BCR>,
2467 <&gcc GCC_USB3_PHY_SEC_BCR>;
2476 clocks = <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>;
2491 clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>,
2492 <&gcc GCC_USB30_PRIM_MASTER_CLK>,
2493 <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>,
2494 <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>,
2495 <&gcc GCC_USB30_PRIM_SLEEP_CLK>;
2499 assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>,
2500 <&gcc GCC_USB30_PRIM_MASTER_CLK>;
2510 power-domains = <&gcc USB30_PRIM_GDSC>;
2512 resets = <&gcc GCC_USB30_PRIM_BCR>;
2535 clocks = <&gcc GCC_CFG_NOC_USB3_SEC_AXI_CLK>,
2536 <&gcc GCC_USB30_SEC_MASTER_CLK>,
2537 <&gcc GCC_AGGRE_USB3_SEC_AXI_CLK>,
2538 <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>,
2539 <&gcc GCC_USB30_SEC_SLEEP_CLK>;
2543 assigned-clocks = <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>,
2544 <&gcc GCC_USB30_SEC_MASTER_CLK>;
2554 power-domains = <&gcc USB30_SEC_GDSC>;
2556 resets = <&gcc GCC_USB30_SEC_BCR>;
2615 clocks = <&gcc GCC_DISP_AHB_CLK>,
2616 <&gcc GCC_DISP_AXI_CLK>,
2886 clocks = <&gcc GCC_GPU_MEMNOC_GFX_CLK>,
2887 <&gcc GCC_GPU_CFG_AHB_CLK>;
2907 <&gcc GCC_DDRSS_GPU_AXI_CLK>,
2908 <&gcc GCC_GPU_MEMNOC_GFX_CLK>;
3256 clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>;