Lines Matching refs:mmcc
7 #include <dt-bindings/clock/qcom,mmcc-msm8996.h>
1406 mmcc: clock-controller@8c0000 { label
1407 compatible = "qcom,mmcc-msm8996";
1412 assigned-clocks = <&mmcc MMPLL9_PLL>,
1413 <&mmcc MMPLL1_PLL>,
1414 <&mmcc MMPLL3_PLL>,
1415 <&mmcc MMPLL4_PLL>,
1416 <&mmcc MMPLL5_PLL>;
1642 power-domains = <&mmcc MMAGIC_CAMSS_GDSC>;
1643 clocks = <&mmcc SMMU_VFE_AHB_CLK>,
1644 <&mmcc SMMU_VFE_AXI_CLK>;
1700 power-domains = <&mmcc VFE0_GDSC>;
1701 clocks = <&mmcc CAMSS_TOP_AHB_CLK>,
1702 <&mmcc CAMSS_ISPIF_AHB_CLK>,
1703 <&mmcc CAMSS_CSI0PHYTIMER_CLK>,
1704 <&mmcc CAMSS_CSI1PHYTIMER_CLK>,
1705 <&mmcc CAMSS_CSI2PHYTIMER_CLK>,
1706 <&mmcc CAMSS_CSI0_AHB_CLK>,
1707 <&mmcc CAMSS_CSI0_CLK>,
1708 <&mmcc CAMSS_CSI0PHY_CLK>,
1709 <&mmcc CAMSS_CSI0PIX_CLK>,
1710 <&mmcc CAMSS_CSI0RDI_CLK>,
1711 <&mmcc CAMSS_CSI1_AHB_CLK>,
1712 <&mmcc CAMSS_CSI1_CLK>,
1713 <&mmcc CAMSS_CSI1PHY_CLK>,
1714 <&mmcc CAMSS_CSI1PIX_CLK>,
1715 <&mmcc CAMSS_CSI1RDI_CLK>,
1716 <&mmcc CAMSS_CSI2_AHB_CLK>,
1717 <&mmcc CAMSS_CSI2_CLK>,
1718 <&mmcc CAMSS_CSI2PHY_CLK>,
1719 <&mmcc CAMSS_CSI2PIX_CLK>,
1720 <&mmcc CAMSS_CSI2RDI_CLK>,
1721 <&mmcc CAMSS_CSI3_AHB_CLK>,
1722 <&mmcc CAMSS_CSI3_CLK>,
1723 <&mmcc CAMSS_CSI3PHY_CLK>,
1724 <&mmcc CAMSS_CSI3PIX_CLK>,
1725 <&mmcc CAMSS_CSI3RDI_CLK>,
1726 <&mmcc CAMSS_AHB_CLK>,
1727 <&mmcc CAMSS_VFE0_CLK>,
1728 <&mmcc CAMSS_CSI_VFE0_CLK>,
1729 <&mmcc CAMSS_VFE0_AHB_CLK>,
1730 <&mmcc CAMSS_VFE0_STREAM_CLK>,
1731 <&mmcc CAMSS_VFE1_CLK>,
1732 <&mmcc CAMSS_CSI_VFE1_CLK>,
1733 <&mmcc CAMSS_VFE1_AHB_CLK>,
1734 <&mmcc CAMSS_VFE1_STREAM_CLK>,
1735 <&mmcc CAMSS_VFE_AHB_CLK>,
1736 <&mmcc CAMSS_VFE_AXI_CLK>;
1795 clocks = <&mmcc GPU_AHB_CLK>,
1799 power-domains = <&mmcc GPU_GDSC>;
1811 clocks = <&mmcc SMMU_MDP_AHB_CLK>,
1812 <&mmcc SMMU_MDP_AXI_CLK>;
1815 power-domains = <&mmcc MDSS_GDSC>;
2079 clocks = <&mmcc GPU_GX_GFX3D_CLK>,
2080 <&mmcc GPU_AHB_CLK>,
2081 <&mmcc GPU_GX_RBBMTIMER_CLK>,
2091 power-domains = <&mmcc GPU_GDSC>;
2155 power-domains = <&mmcc MDSS_GDSC>;
2161 clocks = <&mmcc MDSS_AHB_CLK>;
2176 clocks = <&mmcc MDSS_AHB_CLK>,
2177 <&mmcc MDSS_AXI_CLK>,
2178 <&mmcc MDSS_MDP_CLK>,
2179 <&mmcc SMMU_MDP_AXI_CLK>,
2180 <&mmcc MDSS_VSYNC_CLK>;
2214 clocks = <&mmcc MDSS_MDP_CLK>,
2215 <&mmcc MDSS_AHB_CLK>,
2216 <&mmcc MDSS_HDMI_CLK>,
2217 <&mmcc MDSS_HDMI_AHB_CLK>,
2218 <&mmcc MDSS_EXTPCLK_CLK>;
2259 clocks = <&mmcc MDSS_AHB_CLK>,
2278 power-domains = <&mmcc MMAGIC_VIDEO_GDSC>;
2279 clocks = <&mmcc SMMU_VIDEO_AHB_CLK>,
2280 <&mmcc SMMU_VIDEO_AXI_CLK>;
2290 power-domains = <&mmcc VENUS_GDSC>;
2291 clocks = <&mmcc VIDEO_CORE_CLK>,
2292 <&mmcc VIDEO_AHB_CLK>,
2293 <&mmcc VIDEO_AXI_CLK>,
2294 <&mmcc VIDEO_MAXI_CLK>;
2321 clocks = <&mmcc VIDEO_SUBCORE0_CLK>;
2323 power-domains = <&mmcc VENUS_CORE0_GDSC>;
2328 clocks = <&mmcc VIDEO_SUBCORE1_CLK>;
2330 power-domains = <&mmcc VENUS_CORE1_GDSC>;